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Hardware Specification, Verification and Synthesis: Mathematical Aspects pp 177–201Cite as

Totally verified systems: Linking verified software to verified hardware

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Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 408))

Abstract

We describe exploratory efforts to design and verify a compiler for a formally verified microprocessor as one aspect of the eventual goal of building totally verified systems. Together with a formal proof of correctness for the microprocessor, this yields a precise and rigorously established link between the semantics of the source language and the execution of compiled code by the fabricated microchip. We describe, in particular: (1) how the limitations of real hardware influenced this proof; and (2) how the general framework provided by higher-order logic was used to formalize the compiler correctness problem for a hierarchically structured language.

Author's current address: Computer Laboratory, University of Cambridge, Pembroke Street, Cambridge CB2 3QG, England. After January 1, 1990: Department of Computer Science, University of British Columbia, 6356 Agricultural Road, Vancouver B.C., Canada V6T 1W5.

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References

  1. Alfred V. Aho and Jeffrey D. Ullman, Principles of Compiler Design, Addison-Wesley, Reading, MA., 1977.

    Google Scholar 

  2. William R. Bevier, Warren A. Hunt, Jr., and William D. Young, in: Towards Verified Execution Environments, in: Procs. of the 1987 IEEE Symposium on Security and Privacy, 27–29 April 1987, Oakland, California Computer Society Press, Washington, D.C., 1987 pp. 106–115. Also Technical Report No. 5, Computational Logic, Inc., Austin, Texas, February 1987.

    Google Scholar 

  3. R.S. Boyer and J S. Moore, A Computational Logic, Academic Press, New York, 1979.

    Google Scholar 

  4. R.M. Burstall and P.J. Landin, Programs and their Proofs: an Algebraic Approach, in: B. Meltzer and D. Mitchie, eds., Machine Intelligence, Vol. 4, Edinburgh Univ. Press, Edinburgh, Scotland, 1969. pp. 17–43.

    Google Scholar 

  5. L.M. Chirica, Contributions to Compiler Correctness, Ph.D. Thesis, Report UCLA-ENG-7697, Computer Science Dept., Univ. of California, Los Angeles, October 1976.

    Google Scholar 

  6. Laurian M. Chirica and David F. Martin, Toward Compiler Implementation Correctness Proofs, ACM Transactions on Programming Languages and Systems, Vol. 8, No. 2, April 1986, pp. 185–214.

    Google Scholar 

  7. Avra Jean Cohn, Machine Assisted Proofs of Recursion Implementation, Ph.D. Thesis, Technical Report CST-6-79, Dept. of Computer Science, Univ. of Edinburgh, April 1980.

    Google Scholar 

  8. Avra Cohn, Correctness Properties of the Viper Block Model: The Second Level, in: G. Birtwistle and P. Subrahmanyam, eds., Current Trends in Hardware Verification and Automated Theorem Proving, Springer-Verlag, New Univ., May 1988.

    Google Scholar 

  9. P.A. Collier, Simple Compiler Correctness — A Tutorial on the Algebraic Approach, Australian Computer Journ., Vol. 18, No. 3, August 1986, pp. 128–135.

    Google Scholar 

  10. W.J. Cullyer, High Integrity Computing, in: M. Joseph, ed., Formal Techniques in Real-Time and Fault-Tolerant Systems, Lecture Notes in Computer Science, No. 331, Springer-Verlag, Berlin, 1988. pp. 1–35.

    Google Scholar 

  11. J.A. Goguen, J.W. Thatcher, E.G. Wagner, and J.B. Wright, Initial Algebra Semantics and Continuous Algebra, Journ. of the ACM, Vol. 24, No. 1, January 1977, pp. 68–95.

    Google Scholar 

  12. Michael J. C. Gordon, The Denotational Description of Programming Languages, Spring-Verlag, Berlin, 1979.

    Google Scholar 

  13. Mike Gordon, A Proof Generating System for Higher-Order Logic, in: G. Birtwistle and P. Subrahmanyam, eds., VLSI Specification, Verification and Synthesis, Kluwer Academic Publishers, Boston, 1988, pp. 73–128. Also Report No. 103, Computer Lab., Cambridge Univ., January 1987.

    Google Scholar 

  14. Michael J. C. Gordon, Mechanizing Programming Logics in Higher Order Logic, in: G. Birtwistle and P. Subrahmanyam, eds., Current Trends in Hardware Verification and Automated Theorem Proving, Springer-Verlag, New York, 1989, pp. 387–439. Also Report No. 145, Computer Lab., Cambridge Univ., September 1988.

    Google Scholar 

  15. C.A.R. Hoare, An Axiomatic Basis for Computer Programming, Communications of the ACM, Vol. 12, No. 10, October 1969, pp. 576–583.

    Google Scholar 

  16. Jeffrey J. Joyce, Formal Specification and Verification of Microprocessor Systems, in: S. Winter and H. Schumny, eds., Euromicro 88, Procs. of the 14th Symposium on Microprocessing and Microprogramming, Zurich, Switzerland, 29 August–1 September, 1988, North-Holland, Amsterdam, 1988, pp. 371–378. Also Report No. 147, Computer Lab., Cambridge Univ., September 1988.

    Google Scholar 

  17. Jeffrey J. Joyce, A Verified Compiler for a Verified Microprocessor, Report No. 167, Computer Lab., Cambridge Univ., March 1989.

    Google Scholar 

  18. Donald M. Kaplan, Correctness of a Compiler for Algol-like Programs, Stanford Artificial Intelligence Memo No. 48, Stanford Univ., July 1967.

    Google Scholar 

  19. J. Kershaw, The VIPER Microprocessor, Report No. 87014, RSRE, Malvern, UK Ministry of Defence, November 1987.

    Google Scholar 

  20. J. McCarthy and J. Painter, Correctness of a Compiler for Arithmetic Expressions, in: J. Schwartz, ed., Procs. of a Symposia on Applied Mathematics, American Mathematical Society, 1967, pp. 33–41.

    Google Scholar 

  21. Thomas F. Melham, Automating Recursive Type Definitions in Higher Order Logic, in: G. Birtwistle and P. Subrahmanyam, eds., Current Trends in Hardware Verification and Automated Theorem Proving, Springer-Verlag, New York, 1989, pp. 341–386. Also Report No. 146, Computer Lab., Cambridge Univ., September 1988.

    Google Scholar 

  22. Robert Milne and Christopher Strachey, A Theory of Programming Language Semantics, Chapman and Hall, London, 1976.

    Google Scholar 

  23. R. Milner and R. Weyhrauch, Proving Compiler Correctness in a Mechanized Logic, in: B. Meltzer and D. Mitchie, eds., Machine Intelligence, Vol. 7, Edinburgh Univ. Press, Edinburgh, Scotland, 1972, pp. 51–70.

    Google Scholar 

  24. J Strother Moore, A Mechanically Verified Language Implementation, Report No. 30, Computational Logic Inc., Austin, Texas, September 1988.

    Google Scholar 

  25. F. Lockwood Morris, Correctness of Translations of Programming Languages, Ph.D. Thesis, Report STAN-CS-72-303, Computer Science Dept., Stanford Univ., August 1972.

    Google Scholar 

  26. F. Lockwood Morris, Advice on Structuring Compilers and Proving Them Correct, in: Procs. of the ACM Symposium on Principles of Programming Languages, Boston, Mass., October 1973, pp. 144–152.

    Google Scholar 

  27. Malcolm C. Newey, Proving Properties of Assembly Language Programs, in: B. Gilchrist, ed., Information Processing 77, North Holland, 1977, pp. 795–799.

    Google Scholar 

  28. Gordon D. Plotkin, A Structured Approach to Operational Semantics, Technical Report DAIMI FN-19, Computer Science Dept., Aarhus Univ., September 1981.

    Google Scholar 

  29. Wolfgang Heinz Polak, Theory of Compiler Specification and Verification, Ph.D. Thesis, Report No. STAN-CS-80-802, Dept. of Computer Science, Stanford Univ., May 1980.

    Google Scholar 

  30. Wolfgang Heinz Polak, Compiler Specification and Verification, Lecture Notes in Computer Science, No. 124, Springer-Verlag, Berlin, 1981.

    Google Scholar 

  31. Bruce D. Russell, Implementation Correctness involving a Language with goto Statements, SIAM Journ. of Computing, Vol. 6, No. 3, September 1977, pp. 403–415.

    Google Scholar 

  32. Joseph E. Stoy, The Scott-Strachey Approach to Programming Language Theory, The MIT Press, Cambridge MA., 1977.

    Google Scholar 

  33. J.W. Thatcher, E.G. Wagner, and J.B. Wright, More on Advice on Structuring Compilers and Proving Them Correct, Theoretical Computer Science, Vol. 15, September 1981, pp. 223–245.

    Google Scholar 

  34. William D. Young, A Verified Code Generator for a Subset of Gypsy, Report No. 33, Computational Logic Inc., Austin, Texas, October 1988.

    Google Scholar 

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Authors and Affiliations

  1. University of Cambridge, UK

    Jeffrey J. Joyce

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  1. Jeffrey J. Joyce
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Miriam Leeser Geoffrey Brown

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© 1990 Springer-Verlag Berlin Heidelberg

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Joyce, J.J. (1990). Totally verified systems: Linking verified software to verified hardware. In: Leeser, M., Brown, G. (eds) Hardware Specification, Verification and Synthesis: Mathematical Aspects. Lecture Notes in Computer Science, vol 408. Springer, New York, NY. https://doi.org/10.1007/0-387-97226-9_29

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  • DOI: https://doi.org/10.1007/0-387-97226-9_29

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  • Publisher Name: Springer, New York, NY

  • Print ISBN: 978-0-387-97226-8

  • Online ISBN: 978-0-387-34801-8

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