Abstract
Energy efficient embedded systems consist of a heterogeneous collection of very specific building blocks, connected together by a complex network of many dedicated busses and interconnect options. The trend to merge multiple functions into one device makes the design and integration of these “systems-on-chip” (SOC’s) even more challenging. Yet, specifications and applications are never fixed and require the embedded units to be programmable. The topic of this chapter is to give the designer architectures and design techniques to find the right balance between energy efficiency and flexibility. The key is to include programmability (or reconfiguration) at the right level of abstraction and tuned to the application domain. The challenge is to provide an exploration and programming environment for this heterogeneous architecture platform.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
References
D. Ching, P. Schaumont, I. Verbauwhede, “Integrated Modeling and Generation of a Reconfigurable Network-On-Chip,” Proc. 11th Reconfigurable Architectures Workshop, RAW 2004, Santa Fe, NM, April 2004.
W. Dally, B. Towles, “Route Packets, not wires: on-chip interconnection networks,” Proc. DAC 2001.
R. David et al., “Low-Power Reconfigurable Processors”, Chapter 20 in “Low Power E Electronics Design,” edited by C. Piguet, CRC Press, 2004.
GEZEL kernel, http://www.ee.ucla.edu/~schaum/gezel
B. Kienhuis, et al., “A Methodology to Design Programmable Embedded Systems”, LNCS, Vol 2268, Nov. 2001.
J. Kim, et al., “A 2-Gb/s/pin Source Synchronous CDMA Bus Interface with simultaneous Multi-Chip Access and Reconfigurable I/O capability,” CICC, Sept 2003.
MPICH — A portable implementation of MPI, http://www.unix.mcs.anl.gov/mpi/mpich/
P. Mosch et al., “A 720 mW 50 MOPS 1V. DSP for a Hearing Aid Chip Set,” Proc. ISSCC, pp. 238–239, Feb. 2000.
Õzgüun Paker et al., “A heterogeneous multi-core platform for low power signal processing in systems-on-chip,” ESSCIRC 2002.
W. Qin, S. Malik, “Flexible and Formal Modeling of Microprocessors with Application to Retargetable Simulation,” Proceedings of DATE 2003, Mar, 2003, pp.556–561.
F. Rampogna et al., “Magic, a Low-Power, re-configurable DSP”, Chapter 21 in “Low Power Electronics Design”, ed. C. Piguet, CRC Press, 2004.
P. Schaumont, I. Verbauwhede, M. Sarrafzadeh, K. Keutzer, “A quick safari through the reconfiguration jungle,” Proceedings DAC 2001, pg. 172–177, June 2001.
T. Stefanov, C. Zissulescu, A. Turjan, B. Kienhuis, E. Deprettere, “System Design using Kahn Process Networks: The Compaan/Laura Approach”, DATE2004, Feb 2004, Paris, France.
T. Stefanov, B. Kienhuis, E. Deprettere, “Algorithmic Transformation Techniques for Efficient Exploration of Alternative Application Instances”, Proc. CODES’2002, Colorado, May 2002.
I. Verbauwhede, J. M. Rabaey. “Synthesis of Real-Time Systems: Solutions and challenges” Journal of VLSI Signal Processing, Vol. 9,No. 1/2, Jan. 1995, pp. 67–88.
I. Verbauwhede, M.C. F. Chang, “Reconfigurable Interconnect for next generation systems”, Proc. SLIP, pp. 71–74, April 2002.
Xilinx: Virtex-II-Pro Platform FPGAs: Introduction and Overview and Functional Description, Aug. 2003, Oct. 2003, www.xilinx.com/bvdocs/publications/ds083-1.pdf, ds083-2.pdf.
H. Zhang, et al., “A 1V Heterogeneous Reconfigurable Processor IC for Baseband Wireless Applications,” IEEE Journal on Solid State Circuits, November 2000.
C. Zissulescu, et al., “Laura: Leiden Architecture Research and Exploration Tool”, Proc. FPL 2003.
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2004 Springer Science + Business Media, Inc.
About this chapter
Cite this chapter
Verbauwhede, I., Schaumont, P., Piguet, C., Kienhuis, B. (2004). Architectures and Design Techniques for Energy Efficient Embedded DSP and Multimedia Processing. In: Macii, E. (eds) Ultra Low-Power Electronics and Design. Springer, Boston, MA. https://doi.org/10.1007/1-4020-8076-X_8
Download citation
DOI: https://doi.org/10.1007/1-4020-8076-X_8
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4020-8075-3
Online ISBN: 978-1-4020-8076-0
eBook Packages: Springer Book Archive