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A Practical Implementation of the Timing Attack

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Smart Card Research and Applications (CARDIS 1998)

Abstract

When the running time of a cryptographic algorithm is non-constant, timing measurements can leak information about the secret key. This idea, first publicly introduced by Kocher, is developed here to attack an earlier version of the CASCADE smart card. We propose several improvements on Kocher’s ideas, leading to a practical implementation that is able to break a 512-bit key in few hours, provided we are able to collect 300000 timing measurements (128-bit keys can be recovered in few seconds using a personal computer and less than 10000 samples). We therefore show that the timing attack represents an important threat against cryptosystems, which must be very seriously taken into account.

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References

  1. Cascade (Chip Architecture for Smart CArds and portable intelligent DEvices). Project funded by the European Community, see http://www.dice.ucl.ac.be/crypto/cascade

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© 2000 Springer-Verlag Berlin Heidelberg

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Dhem, JF., Koeune, F., Leroux, PA., Mestré, P., Quisquater, JJ., Willems, JL. (2000). A Practical Implementation of the Timing Attack. In: Quisquater, JJ., Schneier, B. (eds) Smart Card Research and Applications. CARDIS 1998. Lecture Notes in Computer Science, vol 1820. Springer, Berlin, Heidelberg. https://doi.org/10.1007/10721064_15

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  • DOI: https://doi.org/10.1007/10721064_15

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-67923-3

  • Online ISBN: 978-3-540-44534-0

  • eBook Packages: Springer Book Archive

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