Abstract
As a result of its object-oriented (OO) feature and corresponding advantages of security, robustness and platform independence, Java is widely applied in embedded devices. However, among current solutions to Java execution engine implemented by software or hardware, the overheads of executing OO related bytecodes are costly and have a great impacts on the overall performance of Java applications, especially in embedded devices, where real-time operations and low power consumptions are required in the case of limited memory. To solve this problem, a novel Java processor architecture called jHISC is proposed where the OO related bytecodes are supported in hardware directly. In jHISC, an object is represented by the hardware-readable data structure -object context, which then makes it possible to implement complex OO related bytecodes at hardware level and access some fields of object in parallel to improve the execution speed. It mainly targets J2ME and implements about 93% bytecodes and 83% OO related bytecodes in hardware directly, and the OO related operations are executed much faster in jHISC than by software traps.
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References
Lee, Y.M., Tak, B.C., Maeng, H.S., Kim, S.D.: Real-time java virtual machine for information appliances. IEEE Transactions on Consumer Electronics 46, 949 (2000)
Grand, M.: Java Language Reference. O’Reilly, Sebastopol (1997)
O’Connor, J.M., Tremblay, M.: Picojava-i: The java virtual machine in hardware. IEEE MICRO 45 (1997)
McGhan, H., O’Connor, J.M.: Picojava: A direct execution engine for java bytecode. Computer, 22 (1998)
Sun Microsystems: PicoJava-II: Java Processor Core (1998)
aJile Systems, Inc.: aJ-100 Real-time Low Power JavaTM Processor (2001)
ARM: Jazelle Technology for Java Application (2001)
NAZOMI Communications Inc.: JA108 – Multimedia Application Processor (2003)
Aurora VLSI Inc.: AU-J2000: Super High Performance Java Processor Core (2000)
Radhakrishnan, R., Bhargava, R., John, L.K.: Improving java performance using hardware translation. ACM International Conference on Supercomputing, 427 (2001)
Kent, K.B., Serra, M.: Hardware/software co-design of a java virtual machine. In: IEEE International Workshop on Rapid Systems Prototyping, p. 66 (2000)
Lattanzi, E., Gayasen, A., Kandemir, M.: et al: Improving java performance using dynamic method migration on fpgas. In: The 18th International Parallel and Distributed Processing Symposium, p. 134 (2004)
Ha, Y., Hipik, R., Vernalde, S., Verkest, D., Engels, M., Lauwereins, R., De Man, H.: Adding hardware support to the hotSpot virtual machine for domain specific applications. In: Glesner, M., Zipf, P., Renovell, M. (eds.) FPL 2002. LNCS, vol. 2438, p. 1135. Springer, Heidelberg (2002)
Glossner, C.J., Vassiliadis, S.: The delft-java engine: An introduction. In: Lengauer, C., Griebl, M., Gorlatch, S. (eds.) Euro-Par 1997. LNCS, vol. 1300, p. 766. Springer, Heidelberg (1997)
Glossner, C.J., Vassiliadis, S.: Delft-java link translation buffer. In: The 24th Conference on EuroMicro, p. 221 (1998)
Schoeberl, M.: JOP: A java optimized processor. In: Meersman, R., Tari, Z. (eds.) OTM-WS 2003. LNCS, vol. 2889, pp. 346–359. Springer, Heidelberg (2003)
Vijaykrishnan, N., Ranganathan, N.: Supporting object accesses in a java processor. IEE Proc.-Comput. Digit. Tech. 147, 435 (2000)
Lun, M.P., Fong, A., Hau, G.K.W.: Object-oriented processor requirements with instruction analysis of java programs. ACM SIGARCH Computer Architecture News 31, 10 (2003)
Lun, M.P., Li, R., Fong, A.: Method manipulation in an object-oriented processor. ACM SIGARCH Computer Architecture News 31, 18 (2003)
Fong, A.S.: A computer architecture with access control and cache option tags on individual instruction operands. ACM SIGARCH Computer Architecture News 31, 1 (2003)
Fong, A.S.: Hisc: A high-level instruction set computer. In: The 7th European Simulation Symposium, p. 406 (1995)
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Tan, Y., Yau, C., Lo, K., Mok, P., Fong, A.S. (2005). A Novel JAVA Processor for Embedded Devices. In: Hämäläinen, T.D., Pimentel, A.D., Takala, J., Vassiliadis, S. (eds) Embedded Computer Systems: Architectures, Modeling, and Simulation. SAMOS 2005. Lecture Notes in Computer Science, vol 3553. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11512622_13
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DOI: https://doi.org/10.1007/11512622_13
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