Abstract
This work presents further enhancements to an environment for exploring coarse grained reconfigurable data-driven array architectures suitable to implement data-stream applications. The environment takes advantage of Java and XML technologies to enable architectural trade-off analysis. The flexibility of the approach to accommodate different topologies and interconnection patterns is shown by a first mapping scheme. Three benchmarks from the DSP scenario, mapped on hexagonal and grid architectures, are used to validate our approach and to establish comparison results.
This is a preview of subscription content, log in via an institution.
Buying options
Tax calculation will be finalised at checkout
Purchases are for personal use only
Learn about institutional subscriptionsPreview
Unable to display preview. Download preview PDF.
References
Hartenstein, R.: A Decade of Reconfigurable Computing: a Visionary Retrospective. In: Int’l Conf. on Design, Automation and Test in Europe (DATE 2001), Munich, Germany, pp. 642–649 (2001)
Bossuet, L., Gogniat, G., Philippe, J.L.: Fast design space exploration method for reconfigurable architectures. In: Int’l Conference on Engineering of Reconfigurable Systems and Algorithm (ERSA 2003), Las Vegas, Nevada (2003)
Veen, A.H.: Dataflow machine architecture. ACM Computing Surveys 18, 365–396 (1986)
Hartenstein, R., Kress, R., Reinig, H.: A Dynamically Reconfigurable Wavefront Array Architecture. In: Proc. Int’l Conference on Application Specific Array Processors (ASAP 1994), pp. 404–414 (1994)
Thies, W., Karczmarek, M., Amarasinghe, S.: StreamIt: A Language for Streaming Applications. In: Proc. of the Int’l Conf. on Compiler Construction (CC 2002) (2002)
Imlig, N., et al.: Programmable Dataflow Computing on PCA. IEICE Trans. Fundamentals E83-A, 2409–2416 (2000)
Hartenstein, R., Herz, M., Hoffmann, T., Nageldinger, U.: Generation of design suggestions for coarse-grain reconfigurable architectures. In: Grünbacher, H., Hartenstein, R.W. (eds.) FPL 2000. LNCS, vol. 1896, p. 389. Springer, Heidelberg (2000)
Hartenstein, R., Herz, M., Hoffmann, T., Nageldinger, U.: KressArray Xplorer: A New CAD Environment to Optimize Reconfigurable Datapath Array Architectures. In: 5th Asia and South Pacific Design Automation Conference (ASP-DAC 2000), Yokohama, Japan, pp. 163–168 (2000)
Ferreira, R., Cardoso, J.M.P., Neto, H.C.: An Environment for Exploring Data-Driven Architectures. In: Becker, J., Platzner, M., Vernalde, S. (eds.) FPL 2004. LNCS, vol. 3203, pp. 1022–1026. Springer, Heidelberg (2004)
Hendrich, N.: A Java-based Framework for Simulation and Teaching. In: 3rd European Workshop on Microelectronics Education (EWME 2000), Aix en Provence, France, pp. 285–288 (2000)
Burger, D., et al.: Scaling to the End of Silicon with EDGE architectures. IEEE Computer, 44–55 (2004)
Cardoso, J.M.P.: Self-loop pipelining and reconfigurable dataflow arrays. In: Pimentel, A.D., Vassiliadis, S. (eds.) SAMOS 2004. LNCS, vol. 3133, pp. 234–243. Springer, Heidelberg (2004)
Cardoso, J.M.P.: Dynamic Loop Pipelining in Data-Driven Architectures. In: ACM Int’l Conference on Computing Frontiers (CF 2005), Ischia, Italy (2005)
Koren, I., et al.: A Data-Driven VLSI Array for Arbitrary Algorithms. IEEE Computer 21, 30–43 (1989)
Bansal, N., et al.: Network Topology Exploration of Mesh-Based Coarse-Grain Reconfigurable Architectures. In: Design, Automation and Test in Europe Conference (DATE 2004), Paris, France, pp. 474–479 (2004)
Texas Instruments, Inc. TMS320C6000 Highest Performance DSP Platform (1995-2003), http://www.ti.com/sc/docs/products/dsp/c6000/benchmarks/62x.htm#search
Budiu, M., Goldstein, S.C.: Compiling application-specific hardware. In: Glesner, M., Zipf, P., Renovell, M. (eds.) FPL 2002. LNCS, vol. 2438, pp. 853–863. Springer, Heidelberg (2002)
Cardoso, J.M.P., Weinhardt, M.: XPP-VC: A C compiler with temporal partitioning for the PACT-XPP architecture. In: Glesner, M., Zipf, P., Renovell, M. (eds.) FPL 2002. LNCS, vol. 2438, pp. 864–874. Springer, Heidelberg (2002)
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2005 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Ferreira, R., Cardoso, J.M.P., Toledo, A., Neto, H.C. (2005). Data-Driven Regular Reconfigurable Arrays: Design Space Exploration and Mapping. In: Hämäläinen, T.D., Pimentel, A.D., Takala, J., Vassiliadis, S. (eds) Embedded Computer Systems: Architectures, Modeling, and Simulation. SAMOS 2005. Lecture Notes in Computer Science, vol 3553. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11512622_6
Download citation
DOI: https://doi.org/10.1007/11512622_6
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-26969-4
Online ISBN: 978-3-540-31664-0
eBook Packages: Computer ScienceComputer Science (R0)