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Verifying Very Large Industrial Circuits Using 100 Processes and Beyond

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Part of the book series: Lecture Notes in Computer Science ((LNPSE,volume 3707))

Abstract

Recent advances in scheduling and networking have cleared the way for efficient exploitation of large-scale distributed computing platforms, such as computational grids and huge clusters. Such infrastructures hold great promise for the highly resource-demanding task of verifying and checking large models, given that model checkers would be designed with a high degree of scalability and flexibility in mind.

In this paper we focus on the mechanisms required to execute a high-performance, distributed, symbolic model checker on top of a large-scale distributed environment. We develop a hybrid algorithm for slicing the state space and dynamically distribute the work among the worker processes. We show that the new approach is faster, more effective, and thus much more scalable than previous slicing algorithms. We then present a checkpoint-restart module that has very low overhead. This module can be used to combat failures which become probable with the size of the computing platform. However, checkpoint-restart is even more handy for the scheduling system: it can be used to avoid reserving large numbers of workers, thus making the distributed computation work-efficient. Finally, we discuss for the first time the effect of reorder on the distributed model checker and show how the distributed system performs more efficient reordering than the sequential one.

We implemented our contributions on a network of 200 processors, using a distributed scalable scheme that employs a high-performance industrial model checker from Intel. Our results show that the system was able to verify real-life models much larger than was previously possible.

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© 2005 Springer-Verlag Berlin Heidelberg

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Fix, L., Grumberg, O., Heyman, A., Heyman, T., Schuster, A. (2005). Verifying Very Large Industrial Circuits Using 100 Processes and Beyond. In: Peled, D.A., Tsay, YK. (eds) Automated Technology for Verification and Analysis. ATVA 2005. Lecture Notes in Computer Science, vol 3707. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11562948_4

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  • DOI: https://doi.org/10.1007/11562948_4

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-29209-8

  • Online ISBN: 978-3-540-31969-6

  • eBook Packages: Computer ScienceComputer Science (R0)

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