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Panhellenic Conference on Informatics

PCI 2005: Advances in Informatics pp 622–632Cite as

Hardware Support for Multithreaded Execution of Loops with Limited Parallelism

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Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 3746))

Abstract

Loop scheduling has significant differences in multithreaded from other parallel processors. The sharing of hardware resources imposes new scheduling limitations, but it also allows a faster communication across threads. We present a multithreaded processor model, Coral 2000, with hardware extensions that support Macro Software Pipelining, a loop scheduling technique for multithreaded processors. We tested and evaluated Coral 2000 on a cycle-level simulator, using synthetic and integer SPEC benchmarks. We obtained speedups of up to 30% with respect to highly optimized superblock-based schedules on loops that exhibit limited parallelism.

This work was supported in part by the National Science Foundation, the Office of Naval Research, by a research grant from the National Security Agency and a research donation from Intel Corp. Most development and testing were done on the computers of the National Center for Supercomputing Applications at the University of Illinois.

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Author information

Authors and Affiliations

  1. Dept. of Computer & Communications Engineering, University of Thessaly, Volos, 38221, Greece

    Georgios Dimitriou

  2. Dept. of Electrical & Computer Engineering, University of Illinois at Urbana-Champaign, Urbana, Illinois, 61801, USA

    Constantine Polychronopoulos

Authors
  1. Georgios Dimitriou
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  2. Constantine Polychronopoulos
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Editor information

Editors and Affiliations

  1. Department of Computer and Communication Engineering, University of Thessaly, Glavani 37, 382 21, Volos, Greece

    Panayiotis Bozanis

  2. Department of Computer and Communication Engineering, University of Thessaly, 382 21, Volos, Greece

    Elias N. Houstis

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© 2005 Springer-Verlag Berlin Heidelberg

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Dimitriou, G., Polychronopoulos, C. (2005). Hardware Support for Multithreaded Execution of Loops with Limited Parallelism. In: Bozanis, P., Houstis, E.N. (eds) Advances in Informatics. PCI 2005. Lecture Notes in Computer Science, vol 3746. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11573036_59

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  • DOI: https://doi.org/10.1007/11573036_59

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-29673-7

  • Online ISBN: 978-3-540-32091-3

  • eBook Packages: Computer ScienceComputer Science (R0)

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