Abstract
In this paper we propose a novel deblocking filter architecture using register array structure for standard video codec hardware. The proposed register array consists of multiple sub-macroblocks for a single macroblock and several sub-macroblock registers for the up and left neighboring macroblocks. The operation procedure of the register array is also presented. The proposed register array achieves fast operating speed and small circuit size at the same time.
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References
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© 2006 Springer-Verlag Berlin Heidelberg
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Bae, J., Park, N., Lee, SW. (2006). Register Array Structure for Effective Edge Filtering Operation of Deblocking Filter. In: Sha, E., Han, SK., Xu, CZ., Kim, MH., Yang, L.T., Xiao, B. (eds) Embedded and Ubiquitous Computing. EUC 2006. Lecture Notes in Computer Science, vol 4096. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11802167_81
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DOI: https://doi.org/10.1007/11802167_81
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-36679-9
Online ISBN: 978-3-540-36681-2
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