Skip to main content

Application of a Novel Evolutionary Neural Network for Macro-cell Placement Optimization in VLSI Physical Design

  • Conference paper
Intelligent Computing (ICIC 2006)

Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 4113))

Included in the following conference series:

Abstract

As operation frequencies and integration densities of modern very large-scale integration (VLSI) circuits increase while device sizes shrink, the quest for high-speed VLSI applications has highlighted the negligible effects of interconnects. It is important to minimize the interconnect wire lengths during VLSI physical design stage. This paper focuses on the minimization process of the total wire length after placement, that is, macro-cell orientation. A novel evolutionary neural network approach based on the concept of evolutionary programming (EPENN) is proposed to address this combinatorial optimization problem. Numerical experiments and simulation results have shown that the presented approach can obtain high quality solutions with low computational complexity.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 84.99
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 109.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. Achar, R., Nakhla, M.S.: Simulation of High-Speed Interconnects. Proceedings of the IEEE 89(5), 693–728 (2001)

    Article  Google Scholar 

  2. Nakhla, M., Ushida, A.: Special Issue on Simulation, Modeling, and Electrical Design of High-Speed Interconnects. IEEE Trans, Circuits Syst. 47, 44–45 (2000)

    Google Scholar 

  3. Gao, D.S., Yang, A.T., Kang, S.M.: Modeling and Simulation of Interconnection Delays and Crosstalk in High-Speed IC. IEEE Trans, Circuit Syst. 37, 1–9 (1990)

    Article  MathSciNet  Google Scholar 

  4. Cong, J.: An Interconnect-Centric Design Flow for Nanometer Technologies. In: Proc. of Int’l Symp. on VLSI Technology, System, and Applications, pp. 54–57 (1999)

    Google Scholar 

  5. Breuer, M.A., Sarrafzadeh, M., Somenzi, F.: Fundamental CAD Algorithms. IEEE Trans, CAD of Integrated Circuits and Syst. 19(12), 1449–1475 (2000)

    Article  Google Scholar 

  6. Nan, G.F., Li, M.Q.: Application of Evolutionary Algorithm to Three Key Problems in VLSI Layout. In: Proceedings of the 4th ICMLC, Guangzhou (2005)

    Google Scholar 

  7. Mazumder, P.: Genetic Algorithms for VLSI Design, Layout & Test Automation. Prentice-Hall, Englewood Cliffs (1999)

    Google Scholar 

  8. Yao, B., Hou, W.T., Hong, X.L., Cai, Y.C.: FAME: A Fast Detailed Placement Algorithm for Standard Cell Layout Based on Mixed Min-cut and Enumeration. Chinese Journal of Semiconductors 21, 744–753 (2005)

    Google Scholar 

  9. Gao, W.: Study on New Evolutionary Neural Network. In: Proc. of 3rd ICMLC, Xi’an (2003)

    Google Scholar 

  10. Fang, J., Xi, Y.G.: Neural Network Design Based on Evolutionary Programming. Artificial Intelligence in Engineering, pp. 155–161. Elsevier, Amsterdam (1997)

    Google Scholar 

  11. Yamada, M., Liu, C.L.: An Analytical Method for Optimal Module Orientation. In: Proc. Int. Symp. Circuits and Systems, pp. 1679–1682 (1988)

    Google Scholar 

  12. Libeskind-Hadas, R., Liu, C.L.: Solutions to the Module Orientation and Rotation Problems by Neural Computation Networks. In: Proc. 26th ACM/IEEE Design Automation Conf., pp. 400–405 (1989)

    Google Scholar 

  13. Lee, K.C., Takefuji, Y.: A Generalized Maximum Neural Network for the Module Orientation Problem. Int. J. Electron. 72(3), 331–355 (1992)

    Article  Google Scholar 

  14. Funabiki, N., Kitamichi, J., Nishikawa, S.: An Evolutionary Neural Network Approach for Module Orientation Problems. IEEE Trans, Systems, Man, and Cybernetics Part B: Cybernetics 28(6), 849–856 (1998)

    Article  Google Scholar 

  15. Gloria, G., Jose, M.: Design and Analysis of Maximum Hopfield Networks. IEEE Trans, Neural Networks 12(2), 329–339 (2001)

    Article  Google Scholar 

  16. Angeline, P.J., Saunders, G.M., Pollack, J.: An Evolutionary Algorithm that Constructs Neural Networks. IEEE Trans, Neural Networks 5, 54–65 (1994)

    Article  Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Editor information

Editors and Affiliations

Rights and permissions

Reprints and permissions

Copyright information

© 2006 Springer-Verlag Berlin Heidelberg

About this paper

Cite this paper

Zhou, W., Wang, G., Chen, X. (2006). Application of a Novel Evolutionary Neural Network for Macro-cell Placement Optimization in VLSI Physical Design. In: Huang, DS., Li, K., Irwin, G.W. (eds) Intelligent Computing. ICIC 2006. Lecture Notes in Computer Science, vol 4113. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11816157_77

Download citation

  • DOI: https://doi.org/10.1007/11816157_77

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-37271-4

  • Online ISBN: 978-3-540-37273-8

  • eBook Packages: Computer ScienceComputer Science (R0)

Publish with us

Policies and ethics