Skip to main content

Reductions for Monotone Boolean Circuits

  • Conference paper
  • 1031 Accesses

Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 4162))

Abstract

The large class, say NLOG, of Boolean functions, including 0-1 Sort and 0-1 Merge, have an upper bound of O(nlogn) for their monotone circuit size, i.e., have circuits with O(nlogn) AND/OR gates of fan-in two. Suppose that we can use, besides such normal AND/OR gates, any number of more powerful “F-gates” which realize a monotone Boolean function F with r (≥2) inputs and r′ (≥1) outputs. Note that the cost of each AND/OR gate is one and we assume that the cost of each F-gate is r. Now we define: A Boolean function f in NLOG is said to be F-Easy if f can be constructed by a circuit with AND/OR/F gates whose total cost is o(nlogn). In this paper we show that 0-1 Merge is not F-Easy for an arbitrary monotone function F such that r′ ≤r/logr.

This is a preview of subscription content, log in via an institution.

Buying options

Chapter
USD   29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD   84.99
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD   109.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Learn about institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. Andreev, A.E.: On a Method for Obtaining Lower Bounds for the Complexity of Individual Monotone Functions. Sov. Math. Doklady 31(3), 530–534 (1985)

    MATH  Google Scholar 

  2. Ajtai, M., Komlós, J., Szemerédi, E.: An O(nlogn) Sorting Network. In: Proc. 15th STOC, pp. 1–9 (1983)

    Google Scholar 

  3. Amano, K., Maruoka, A.: A Superpolynomial Lower Bound for a Circuit Computing the Clique Function with at most (1/6)loglogn Negation Gates. SIAM J. Comput. 35(1), 201–216 (2005)

    Article  MATH  MathSciNet  Google Scholar 

  4. Amano, K., Maruoka, A., Tarui, J.: On the Negation-Limited Circuit Complexity of Merging. Discrete Applied Mathematics 126(1), 3–8 (2003)

    Article  MATH  MathSciNet  Google Scholar 

  5. Beals, R., Nishino, T., Tanaka, K.: On the Complexity of Negation-Limited Boolean Networks. SIAM J. Comput. 27(5), 1334–1347 (1998)

    Article  MATH  MathSciNet  Google Scholar 

  6. Dunne, P.E.: Lower Bound on the Monotone Network Complexity of Threshold Functions. In: Proc. 22nd Ann. Allerton Conf. on Communication, Control and Computing, pp. 911–920 (1984)

    Google Scholar 

  7. Harnik, D., Raz, R.: Higher Lower Bounds on Monotone Size. In: Proc. 32th STOC, pp. 378–387 (2000)

    Google Scholar 

  8. Iwama, K., Morizumi, H.: An Explicit Lower Bound of 5n-o(n) for Boolean Circuits. In: Diks, K., Rytter, W. (eds.) MFCS 2002. LNCS, vol. 2420, pp. 353–364. Springer, Heidelberg (2002)

    Chapter  Google Scholar 

  9. Iwama, K., Morizumi, H., Tarui, J.: Lower Bounds on the Negation-Limited Circuit Complexity (manuscript) (2006)

    Google Scholar 

  10. Lamagna, E.A.: The Complexity of Monotone Networks for Certain Bilinear Forms, Routing Problems, Sorting, and Merging. IEEE Trans. Computers 28(10), 773–782 (1979)

    Article  MATH  MathSciNet  Google Scholar 

  11. Long, D.: The Monotone Circuit Complexity of Threshold Functions. University of Oxford (unpublished manuscript) (1986)

    Google Scholar 

  12. Lachish, O., Raz, R.: Explicit Lower Bound of 4.5n − o(n) for Boolean Circuits. In: Proc. 33th STOC, pp. 399–408 (2001)

    Google Scholar 

  13. Lamagna, E.A., Savage, J.E.: Combinational Complexity of Some Monotone Functions. In: Proc. 15th Ann. IEEE Symp. on Switching and Automata Theory, pp. 140–144 (1974)

    Google Scholar 

  14. Oruç, A.Y.: A Study of Permutation Networks: New Designs and Some Generalizations. J. Parallel Distrib. Comput. 22(2), 359–366 (1994)

    Article  Google Scholar 

  15. Pippenger, N., Valiant, L.G.: Shifting Graphs and Their Applications. J. ACM 23(3), 423–432 (1976)

    Article  MATH  MathSciNet  Google Scholar 

  16. Razborov, A.A.: Lower Bounds on the Monotone Complexity of Some Boolean Functions. Sov. Math. Doklady 31, 354–357 (1985)

    MATH  Google Scholar 

  17. Schnorr, C.: Zwei lineare untere Schranken für die Komplexität Boolescher Funktionen. Computing 13, 155–171 (1974)

    Article  MATH  MathSciNet  Google Scholar 

  18. Sung, S.C., Tanaka, K.: Lower Bounds on Negation-Limited Inverters. In: Proc. 2nd DMTCS, pp. 360–368 (1999)

    Google Scholar 

  19. Sung, S.C., Tanaka, K.: An Exponential Gap with the Removal of One Negation Gate. Inf. Process. Lett. 82(3), 155–157 (2002)

    Article  MATH  MathSciNet  Google Scholar 

  20. Tanaka, K., Nishino, T., Beals, R.: Negation-Limited Circuit Complexity of Symmetric Functions. Inf. Process. Lett. 59(5), 273–279 (1996)

    Article  MATH  MathSciNet  Google Scholar 

  21. Valiant, L.G.: Short Monotone Formulae for the Majority Function. J. Algorithms 5(3), 363–366 (1984)

    Article  MATH  MathSciNet  Google Scholar 

  22. Wegener, I.: The Complexity of Boolean Functions. Wiley-Teubner Series in Computer Science (1987)

    Google Scholar 

  23. Zwick, U.: A 4n Lower Bound on the Combinatorial Complexity of Certain Symmetric Boolean Functions over the Basis of Unate Dyadic Boolean Functions. SIAM J. Comput. 20, 499–505 (1991)

    Article  MATH  MathSciNet  Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Editor information

Editors and Affiliations

Rights and permissions

Reprints and permissions

Copyright information

© 2006 Springer-Verlag Berlin Heidelberg

About this paper

Cite this paper

Iwama, K., Morizumi, H. (2006). Reductions for Monotone Boolean Circuits. In: Královič, R., Urzyczyn, P. (eds) Mathematical Foundations of Computer Science 2006. MFCS 2006. Lecture Notes in Computer Science, vol 4162. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11821069_47

Download citation

  • DOI: https://doi.org/10.1007/11821069_47

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-37791-7

  • Online ISBN: 978-3-540-37793-1

  • eBook Packages: Computer ScienceComputer Science (R0)

Publish with us

Policies and ethics