Abstract
The deep sub-micron technologies of today present us with new opportunities and challenges. On one hand the level of integration and available process options enables the development of fully integrated high performance systems (digital, mixed signal and RF) , while on the other hand we have the challenge of designing with increasing manufacturing variation and new electrical /reliability effects to consider. New design tools and methodologies are required. Looking to the past and even the present can give clues for the direction to take for the future. This talk , will describe through concrete examples the challenges overcome in developing design platforms for volume manufacture in the most recent technology nodes, including discussing the most imminent challenges to solve to maximize the benefit from forthcoming technologies.
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© 2006 Springer-Verlag Berlin Heidelberg
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Wilson, R. (2006). Design for Volume Manufacturing in the Deep Submicron ERA. In: Vounckx, J., Azemard, N., Maurine, P. (eds) Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation. PATMOS 2006. Lecture Notes in Computer Science, vol 4148. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11847083_67
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DOI: https://doi.org/10.1007/11847083_67
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-39094-7
Online ISBN: 978-3-540-39097-8
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