Abstract
A novel architecture for performing digital color image enhancement based on reflectance/illumination model is proposed in this paper. The approach promotes the log-domain computation to eliminate all multiplications, divisions and exponentiations utilizing the approximation techniques for efficient estimation of log2 and inverse-log2. A new quadrant symmetric architecture is also incorporated into the design of homomorphic filter to achieve very high throughput rate which is part of V component enhancement in Hue-Saturation-Value (HSV) color space. The pipelined design of the filter features the flexibility in reloading a wide range of kernels for different frequency responses. A generalized architecture of max/min filter is also presented for efficient extraction of V component. With effective color space conversion, the HSV-domain image enhancement architecture is able to achieve a throughput rate of 182.65 million outputs per second (MOPS) or equivalently 52.8 billion operations per second on Xilinx’s Virtex II XC2V2000-4ff896 field programmable gate array (FPGA) at a clock frequency of 182.65 MHz. It can process over 174.2 mega-pixel (1024×1024) frames per second and consumes approximately 70.7% less hardware resource when compared to the design presented in [10].
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References
Caselles, V., Lisani, J.L., Morel, J.M., Sapiro, G.: Shape Preserving Local Histogram Modification. IEEE Trans. Image Process. 8(2), 220–230 (1999)
Jobson, D.J., Rahman, Z., Woodell, G.A.: A Multi-scale Retinex for Bridging the Gap between Color Images and the Human Observation of Scenes. IEEE Trans. Image Process. 6(7), 965–976 (1997)
Seow, M.J., Asari, V.K.: Ratio Rule and Homomorphic Filter for Enhancement of Digital Color Image. Journal of Neurocomputing (in print, 2006)
Seow, M.J., Asari, V.K.: Associative Memory using Ratio Rule for Multi-valued Pattern Association. In: Proceedings of the IEEE International Joint Conference on Neural Networks, Portland, Oregon, pp. 2518–2522 (2003)
Breitzman, A.F.: Automatic Derivation and Implementation of Fast Convolution Algorithms. PhD Dissertation, Drexel University (2003)
Jamro, E.: Parameterised Automated Generation of Convolvers Implemented in FPGAs. PhD Dissertation, University of Mining and Mentallurgy (2001)
Wong, A.: A New Scalable Systolic Array Processor Architecture for Discrete Convolution. MS Thesis, University of Kentucky (2003)
Yli-kaakinen, J., Saramaki, T.: A Systematic Algorithm for the Design of Multiplierless FIR Filters. In: Proceedings of the IEEE International Symposium Circuits and Systems, Sydney, Australia, vol. 2, pp. 185–188 (2001)
Zhang, M.Z., Ngo, H.T., Asari, V.K.: Design of an Efficient Multiplier-Less Architecture for Multi-dimensional Convolution. In: Srikanthan, T., Xue, J., Chang, C.-H. (eds.) ACSAC 2005. LNCS, vol. 3740, pp. 65–78. Springer, Heidelberg (2005)
Zhang, M.Z., Seow, M.J., Asari, V.K.: A High Performance Architecture for Color Image Enhancement Using a Machine Learning Approach. International Journal of Computational Intelligence Research – Special Issue on Advances in Neural Networks 2(1), 40–47 (2006)
Tao, L., Asari, V.K.: An Adaptive and Integrated Neighborhood Dependent Approach for Nonlinear Enhancement of Color Images. SPIE Journal of Electronic Imaging 14(4), 1.1–1.14 (2005)
Tao, L., Asari, V.K.: An Efficient Illuminance-Reflectance Nonlinear Video Stream Enhancement Model. In: IS&T/SPIE Symposium on Electronic Imaging: Real-Time Image Processing III, San Jose, CA (2006)
Stockham Jr., T.G.: Image Processing in the Context of a Visual Model. Proceedings IEEE 60, 828–842 (1972)
Zhang, M.Z., Ngo, H.T., Livingston, A.R., Asari, V.K.: An Efficient VLSI Architecture for 2-D Convolution with Quadrant Symmetric Kernels. In: IEEE Computer Society Proceedings of the International Symposium on VLSI – ISVLSI 2005, Tampa, Florida, pp. 303–304 (2005)
Zhang, M.Z., Seow, M.J., Asari, V.K.: A Hardware Architecture for Color Image Enhancement Using a Machine Learning Approach with Adaptive Parameterization. In: International Joint Conference on Neural Networks – IJCNN 2006, Vancouver, BC, Canada (accepted, 2006)
Kovesi, P.D.: Homomorphic filter (accessed, March 2006), http://www.csse.uwa.edu.au/~pk/Research/MatlabFns/FrequencyFilt/homomorphic.m
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Zhang, M.Z., Tao, L., Seow, MJ., Asari, V.K. (2006). Design of an Efficient Flexible Architecture for Color Image Enhancement. In: Jesshope, C., Egan, C. (eds) Advances in Computer Systems Architecture. ACSAC 2006. Lecture Notes in Computer Science, vol 4186. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11859802_26
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DOI: https://doi.org/10.1007/11859802_26
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-40056-1
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