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A High-Speed Parallel Architecture for Stereo Matching

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Advances in Visual Computing (ISVC 2006)

Part of the book series: Lecture Notes in Computer Science ((LNIP,volume 4291))

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Abstract

The stereo matching algorithm based on the belief propagation (BP) has the low matching error as the global method, but has the disadvantage of a long processing time. In addition to a low error of less than 2.6% in the Middlebury image simulation, a new architecture based on BP shows a high-speed parallel VLSI structure of the time complexity O(N), at properly small iterations, so that it can be useful as a chip in the real-time application like robots and navigations.

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Author information

Authors and Affiliations

  1. Electronic amd Electrical Engineering, Pohang University of Science and Technology, Pohang, Kyungbuk, 790-784, South Korea

    Sungchan Park & Hong Jeong

Authors
  1. Sungchan Park
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  2. Hong Jeong
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Editor information

Editors and Affiliations

  1. Department of Computer Science and Engineering, University of Nevada, Reno, USA

    George Bebis

  2. NASA Ames Research Center, Moffett Field, CA, USA

    Richard Boyle

  3. Lawrence Berkeley National Laboratory, Berkeley, CA, USA

    Bahram Parvin

  4. Desert Research Institute, Reno, NV, USA

    Darko Koracin

  5. Digital Image Research Center, Kingston University, London, UK

    Paolo Remagnino

  6. Intel, 95052, Santa Clara, CA, USA

    Ara Nefian

  7. University of California, 430, Computer Science Building, 92697-3425, Irvine, CA, USA

    Gopi Meenakshisundaram

  8. Institute for Data Analysis and Visualization, P.O. Box

    Valerio Pascucci

  9. Department of Computer Science and Engineering, Czech Technical University in Prague, Czech

    Jiri Zara

  10. Rockwell Scientific, 1049 Camino Dos Rios, 91360, Thousand Oaks, CA, USA

    Jose Molineros

  11. Computer Graphics Group, Bielefeld University, D-33501, Bielefeld, Germany

    Holger Theisel

  12. Hewlett Packard Labs, Palo Alto, CA, USA

    Tom Malzbender

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© 2006 Springer-Verlag Berlin Heidelberg

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Cite this paper

Park, S., Jeong, H. (2006). A High-Speed Parallel Architecture for Stereo Matching. In: Bebis, G., et al. Advances in Visual Computing. ISVC 2006. Lecture Notes in Computer Science, vol 4291. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11919476_34

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  • DOI: https://doi.org/10.1007/11919476_34

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-48628-2

  • Online ISBN: 978-3-540-48631-2

  • eBook Packages: Computer ScienceComputer Science (R0)

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