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International Symposium on Parallel and Distributed Processing and Applications

ISPA 2006: Parallel and Distributed Processing and Applications pp 406–417Cite as

On the Implementation of Parallel Shortest Path Algorithms on a Supercomputer

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Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 4330))

Abstract

We investigate the practical merits of a parallel priority queue through its use in the development of a fast and work-efficient parallel shortest path algorithm, originally designed for an EREW PRAM. Our study reveals that an efficient implementation on a real supercomputer requires considerable effort to reduce the communication performance (which in theory is assumed to take constant time). It turns out that the most crucial part of the implementation is the mapping of the logical processors to the physical processing nodes of the supercomputer. We achieve the requested efficient mapping through a new graph-theoretic result of independent interest: computing a Hamiltonian cycle on a directed hyper-torus. No such algorithm was known before for the case of directed hypertori. Our Hamiltonian cycle algorithm allows us to considerably improve the communication cost and thus the overall performance of our implementation.

This work was supported by the Consorzio Ricerche del Gran Sasso (CRGS), by the Human Potential Programme of EU under contract no. HPRN-CT-1999-00104 (project AMORE), and by the Future and Emerging Technologies Unit of EC (IST priority – 6th FP), under contract no. FP6-021235-2 (project ARRIVAL).

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Author information

Authors and Affiliations

  1. Dipartimento di Ingegneria Elettrica e dell’Informazione, Università dell’Aquila, Italy

    Gabriele Di Stefano & Alberto Petricola

  2. Computer Technology Institute and University of Patras, Greece

    Christos Zaroliagis

Authors
  1. Gabriele Di Stefano
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  2. Alberto Petricola
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  3. Christos Zaroliagis
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Editor information

Editors and Affiliations

  1. Department of Computer Science and Engineering, Shanghai Jiao Tong University, 200030, Shanghai, China

    Minyi Guo

  2. Department of Computer Science, St. Francis Xavier University, Antigonish, Canada

    Laurence T. Yang

  3. Dipartimento di Ingegneria dell’ Informazione - Second, University of Naples - Italy, Real Casa dell’Annunziata, via Roma, 29 81031, Aversa (CE), Italy

    Beniamino Di Martino

  4. Institute of Scientific Computing, University of Vienna, Nordbergstr. 15/C/3, A-1090, Vienna, Austria/JPL, Caltech, USA

    Hans P. Zima

  5. Computer Science Department, University of Tennessee, TN 37996-3450, Knoxville, USA

    Jack Dongarra

  6. Grid Computing Center, Shanghai Jiao Tong University, 800 Dongchuan Road, 200240, Shanghai, China

    Feilong Tang

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© 2006 Springer-Verlag Berlin Heidelberg

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Di Stefano, G., Petricola, A., Zaroliagis, C. (2006). On the Implementation of Parallel Shortest Path Algorithms on a Supercomputer. In: Guo, M., Yang, L.T., Di Martino, B., Zima, H.P., Dongarra, J., Tang, F. (eds) Parallel and Distributed Processing and Applications. ISPA 2006. Lecture Notes in Computer Science, vol 4330. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11946441_40

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  • DOI: https://doi.org/10.1007/11946441_40

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-68067-3

  • Online ISBN: 978-3-540-68070-3

  • eBook Packages: Computer ScienceComputer Science (R0)

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