Abstract
Using hierarchical definitions one can describe very large graphs in small space. The blow-up from the length of the hierarchical description to the size of the graph can be as large as exponential. If the efficiency of graph algorithms is measured in terms of the length of the hierarchical description rather than in terms of the graph size, algorithms that do not exploit the hierarchy become hopelessly inefficient. Whether the hierarchy can be exploited to speed up the solution of graph problems depends on the hierarchical graph model. In the literature, hierarchical graph models have been described that allow almost no exploitation of the hierarchy [W 84]. We present a hierarchical graph model that permits to exploit the hierarchy. For this model we give algorithms that test planarity of a hierarchically described graph in linear time in the length of the hierarchical description.
This is a preview of subscription content, log in via an institution to check access.
Preview
Unable to display preview. Download preview PDF.
8. References
Booth, K.S./Lueker, G.S.: Testing for the consecutive ones property, interval graphs, and graph planarity using PQ-tree algorithms. JCSS, Vol. 13 (1976), 335–379
Bentley, J.L./Ottmann, T./Widmayer, P.: The complexity of manipulating hierarchically defined sets of rectangles. In: Advances in Computing Research (F.P. Preparata, ed.) (JAI Press Inc.) 1 (1983), 127–158
Chiba, N./Nishuzeki, T.: A linear algorithm for embedding planar graphs using PQ-trees. JCSS 30,1 (1985), 54–76
Lengauer, T./Mehlhorn, K.: The HILL-System: A design environment for the hierarchical specification, compaction and simulation of integrated circuit layouts. Proceedings of the MIT-Conference on Advanced Research in VLSI (P. Penfield Jr. ed.), Artech House Company (1984), 139–149
Huang, M.A./Steiglitz, K.: A hierarchical compaction algorithm with low page-fault complexity. Proc. Conference on Advanced Research in VLSI (P. Penfield Jr. ed.), Artech House Inc. (1984), 203–212
Hopcroft, J./Tarjan, R.E.: Dividing a graph into triconnected components. SIAM J. Comput. 2,3 (1973), 145–169
Hopcroft, J./Tarjan, R.E.: Efficient planarity testing. JACM 21,4 (1974), 549–568
Lengauer, T.: The complexity of compacting hierarchically specified layouts of integrated circuits. 23rd IEEE-FOCS (1982), 358–368
Lengauer, T.: Efficient solution of connectivity problems on hierarchically defined graphs. "Theoretische Informatik" No. 24, FB 17, Universität-Gesamthochschule Paderborn, Paderborn, West-Germany (1985) (short version in: Proc. of WG '85 (H. Noltemeier, ed.), Trauner Verlag (1985), 201–216)
Lengauer, T.: Hierarchical planarity testing algorithms. "Theoretische Informatik" No. 25, FB 17, Universität-Gesamthochschule Paderborn, Paderborn, West-Germany (1985)
Lengauer, T.: Efficient algorithms for finding minimum spanning forests of hierarchically defined graphs. Proc. STACS 86 (B. Monien, G. Vidal-Naquet, eds.), Springer LNCS 210 (1986), 153–170
Tarjan, R.E.: Depth-first search and linear graph algorithms. SIAM J. Comput. 1,2 (1972), 146–160
Whitney, H.: Non-separable and planar graphs. Trans. AMS 34 (1932), 339–362
Whitney, H.: 2-isomorphic graphs. Am. J. Math. 55 (1933), 245–254
Wagner, K.: The complexity of problems concerning graphs with regularities. Proc. MFCS, Springer LNCS 176 (1984), 544–552
Author information
Authors and Affiliations
Editor information
Rights and permissions
Copyright information
© 1986 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Lengauer, T. (1986). Hierarchical planarity testing algorithms. In: Kott, L. (eds) Automata, Languages and Programming. ICALP 1986. Lecture Notes in Computer Science, vol 226. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-16761-7_71
Download citation
DOI: https://doi.org/10.1007/3-540-16761-7_71
Published:
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-16761-7
Online ISBN: 978-3-540-39859-2
eBook Packages: Springer Book Archive