Abstract
The pper deals with the specification of a pipelined event driven algorithm for discrete simulation using the Functional Parallel Programming Language FP2. We start with a short review of the pipelined event driven simulation algorithm and the main features of FP2. In the main part, the FP2 specification procedure and a proof methodology for liveness and correct termination of the specified network of processes are described.
This research has been supported by ESPRIT Project 415: Parallel Architectures and Languages for Advanced Information Processing — A VLSI-Directed Approach
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References
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Schaefer, P., Schnoebelen, P. (1987). Specification of a pipelined event driven simulator using FP2. In: de Bakker, J.W., Nijman, A.J., Treleaven, P.C. (eds) PARLE Parallel Architectures and Languages Europe. PARLE 1987. Lecture Notes in Computer Science, vol 258. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-17943-7_136
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DOI: https://doi.org/10.1007/3-540-17943-7_136
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