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A layered emulator for design evaluation of MIMD multiprocessors with shared memory

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Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 258))

Abstract

In the design and evaluation of new multiprocessor structures it is necessary to make experiments to explore the consequences of various decisions, e.g. the dynamic interaction between hardware, system software and executing parallel programs. When the target architecture is based on VLSI implementation, it is especially necessary to make the experiments prior to implementation.

An experimental system has been designed that can emulate a wide range of MIMD multiprocessor structures by implementing parts of the hardware functions by software. It consists of several layers of interacting hardware and software. The hardware for emulating the basic processing element contains two 32-bit processors, a floating point processor, 512 Kb RAM, local I/O and a special-purpose bus interface to support a set of communication primitives. A large number of such elements can be interconnected by a global bus.

Ada is one of the languages used for parallel application programs (Ada is a registered trademark of the US Government, AJPO).

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J. W. de Bakker A. J. Nijman P. C. Treleaven

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© 1987 Springer-Verlag Berlin Heidelberg

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Stenström, P., Philipson, L. (1987). A layered emulator for design evaluation of MIMD multiprocessors with shared memory. In: de Bakker, J.W., Nijman, A.J., Treleaven, P.C. (eds) PARLE Parallel Architectures and Languages Europe. PARLE 1987. Lecture Notes in Computer Science, vol 258. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-17943-7_137

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  • DOI: https://doi.org/10.1007/3-540-17943-7_137

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-17943-6

  • Online ISBN: 978-3-540-47144-8

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