Abstract
The main obstruction to automatic verification of Finite State Systems is the huge amount of memory required to complete the verification task (state explosion). This motivates research on distributed as well as disk based verification algorithms.
In this paper we present a disk based Breadth First Explicit State Space Exploration algorithm as well as an implementation of it within the Vlunϕ verifier. Our algorithm exploits transition locality (i.e. the statistical fact that most transitions lead to unvisited states or to recently visited states) to decrease disk read accesses thus reducing the time overhead due to disk usage.
A disk based verification algorithm for Vlunϕ has been already proposed in the literature. To measure the time speed up due to locality exploitation we compared our algorithm with such previously proposed algorithm. Our experimental results show that our disk based verification algorithm is typically more than 10 times faster than such previously proposed disk based verification algorithm.
To measure the time overhead due to disk usage we compared our algorithm with RAM based verification using the (standard) Murϕ verifier with enough memory to complete the verification task. Our experimental results show that even when using 1/10 of the RAM needed to complete verification, our disk based algorithm is only between 1.4 and 5.3 times (3 times on average) slower than (RAM) Murϕ with enough RAM memory to complete the verification task at hand.
Using our disk based Murϕ we were able to complete verification of a protocol with about 109 reachable states. This would require more than 5 gigabytes of RAM using RAM based Murϕ.
This research has been partially supported by MURST projects MEFISTO and SAHARA
This is a preview of subscription content, log in via an institution.
Buying options
Tax calculation will be finalised at checkout
Purchases are for personal use only
Learn about institutional subscriptionsPreview
Unable to display preview. Download preview PDF.
References
R. Bryant. Graph-based algorithms for boolean function manipulation. IEEE Trans. on Computers, C-35(8), Aug 1986.
J. R. Burch, E. M. Clarke, K. L. McMillan, D. L. Dill, and L. J. Hwang. Symbolic model checking: 1020 states and beyond. Information and Computation, (98), 1992.
D. L. Dill, A. J. Drexler, A. J. Hu, and C. H. Yang. Protocol verification as a hardware design aid. In IEEE International Conference on Computer Design: VLSI in Computers and Processors, pages 522–5, 1992.
R. Sisto F. Lerda. Disributed-memory model checking with spin. In Proc. of 5th International SPIN Workshop, volume 1680. LNCS, Springer, 2000.
G. J. Holzmann. The spin model checker. IEEE Trans. on Software Engineering, 23(5):279–295, May 1997.
G. J. Holzmann. An analysis of bitstate hashing. Formal Methods in Systems Design, 1998.
A. J. Hu, G. York, and D. L. Dill. New techniques for efficient verification with implicitily conjoined bdds. In 31st IEEE Design Automation Conference, pages 276–282, 1994.
C. N. Ip and D. L. Dill. Better verification through symmetry. In 11th International Conference on: Computer Hardware Description Languages and their Applications, pages 97–111, 1993.
C. N. Ip and D. L. Dill. Efficient verification of symmetric concurrent systems. In IEEE International Conference on Computer Design: VLSI in Computers and Processors, pages 230–234, 1993.
R. K. Ranjan, J. V. Sanghavi, R. K. Brayton, and A. Sangiovanni-Vincentelli. Binary decision diagrams on network of workstations. In IEEE International Conference on Computer Design, pages 358–364, 1996.
J. V. Sanghavi, R. K. Ranjan, R. K. Brayton, and A. Sangiovanni-Vincentelli. High performance bdd package by exploiting memory hierarchy. In 33rd IEEE Design Automation Conference, 1996.
url: http://netlib.bell-labs.com/netlib/spin/whatispin.html.
U. Stern and D. Dill. Parallelizing the murϕ verifier. In Proc. 9th Int. Conference on: Computer Aided Verification, volume 1254, pages 256–267, Haifa, Israel, 1997. LNCS, Springer.
U. Stern and D. Dill. Using magnetic disk instead of main memory in the murϕ verifier. In Proc. 10th Int. Conference on: Computer Aided Verification, volume 1427, pages 172–183, Vancouver, BC, Canada, 1998. LNCS, Springer.
U. Stern and D. L. Dill. Improved probabilistic verification by hash compaction. In IFIP WG 10.5 Advanced Research Working Conference on: Correct Hardware Design and Verification Methods (CHARME), pages 206–224, 1995.
U. Stern and D. L. Dill. A new scheme for memory-efficient probabilistic verification. In IFIP TC6/WG6.1 Joint International Conference on: Formal Description Techniques for Distributed Systems and Communication Protocols, and Protocol Specification, Testing, and Verification, 1996.
T. Stornetta and F. Brewer. Implementation of an efficient parallel bdd package. In 33rd IEEE Design Automation Conference, pages 641–644, 1996.
E. Tronci, G. Della Penna, B. Intrigila, and M. Venturini Zilli. Exploiting transition locality in automatic verification. In IFIP WG 10.5 Advanced Research Working Conference on: Correct Hardware Design and Verification Methods (CHARME). LNCS, Springer, Sept 2001.
E. Tronci, G. Della Penna, B. Intrigila, and M. Venturini Zilli. A probabilistic approach to space-time trading in automatic verification of concurrent system. In Proc. of 8th IEEE Asia-Pacific Software Engineering Conference (APSEC), Macau SAR, China, Dec 2001. IEEE Computer Society Press.
Pierre Wolper and Dennis Leroy. Reliable hashing without collision detection. In Proc. 5th Int. Conference on: Computer Aided Verification, pages 59–70, Elounda, Greece, 1993.
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2002 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Della Penna, G., Intrigila, B., Tronci, E., Zilli, M.V. (2002). Exploiting Transition Locality in the Disk Based Murϕ Verifier. In: Aagaard, M.D., O’Leary, J.W. (eds) Formal Methods in Computer-Aided Design. FMCAD 2002. Lecture Notes in Computer Science, vol 2517. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-36126-X_13
Download citation
DOI: https://doi.org/10.1007/3-540-36126-X_13
Published:
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-00116-4
Online ISBN: 978-3-540-36126-8
eBook Packages: Springer Book Archive