Abstract
VCC ®(Virtual Component Co-Design) is a system level software tool that supports the design of concurrent systems by specifying the functional model as a set of interconnected functional blocks, the system architecture, and the mapping between functional blocks and architectural elements. VCC provides functional simulation, performance estimation, and refinement of the model to implementation. This chapter provides a brief tutorial on the VCC tool. It describes the model of concurrency in VCC’s default discrete event model of computation. While modeling a system, the importance of separating the behavioral model from the implementation architecture is emphasized. The techniques used to model performance and implementation of the architecture components, as a set of collaborating services, are explained in some detail. Customization of the model of computation, and communication between functional blocks is also discussed. An example is provided that demonstrates the dataflow model of computation implemented on top of the VCC infrastructure. Finally the automatic generation of an implementation from VCC (in terms of HDL and/or C, and the communication code) is described.
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References
H. Chang, L. Cooke, M. Hunt, A. McNelly, G. Martin, and L. Todd, “Surviving the SOC Revolution: A Guide to Platform-Based Design,” Kluwer Academic Publishers, 1999. 191
T. Grotker, S. Liao, G. Martin, and S. Swan, “System Design with SystemC,” Kluwer Academic Publishers, 2002. 192
P. Schaumont, S. Vernalde, L. Rijnders, M. Engels, and I. Bolsens, “Synthesis of multi-rate and variable rate circuits for high speed telecommunications applications,” Proceedings of the European Design and Test Conference, 1997. 192
D. D. Gajski, J. Zhu, R. Domer, A. Gerstlauer, and S. Zhao, “SpecC: Specification Language and Methodology,” Kluwer Academic Publishers, 2000. 192
K. Van Rompaey, D. Verkest, I. Bolsens, and H. D. Man, “CoWare-a design environment for heterogeneous hardware/software systems,” Proceedings of the European Design Automation Conference, 1996. 192
J. T. Buck,, R. Vaidyanathan, “Heterogeneous Modeling and Simulation of Embedded Systems in El Greco,” Proceedings of the International Workshop on Hardware-Software Codesign, 2000. 192
Bob Schutz, “Integrated System Design Environment Lowers Development Risk,” Integrated System Design, A Miller Freeman Publication, March 1999. 192
F. Balarin, M. Chiodo, P. Giusto, H. Hsieh, A. Jurecska, L. Lavagno, C. Passerone, A. Sangiovanni-Vincentelli, E. Sentovitch, K. Suzuki, and B. Tabbara, “Hard-Software Co-Design of Embedded Systems: The POLIS Approach,” Kluwer Academic Publishers, 1997. 192, 194
E. A. de Kock, G. Essink, W. J. M. Smits, P. van der Wolf, J.-Y. Brunel, W. M. Kruijtzer, P. Lieverse, and K. A. Vissers, “YAPI: Application modeling for signal processing systems,” Proceedings of the Design Automation Conference, 2000. 192, 201
S. Edwards, L. Lavagno, E. A. Lee, and A. Sangiovanni-Vincentelli, “Design of embedded systems: Formal models, validation and synthesis,” Proceedings of the IEEE, Vol. 85, No. 3, March 1997. 196
E. A. Lee, and D. G. Messerschmitt, “Static scheduling of Synchronous dataflow programs for digital signal processing,” IEEE Transactions on Computers, Vol. C-36, No. 2, February, 1987. 201
J. T. Buck, S. Ha, E. A. Lee, and D. G. Messerschmitt, “Ptolemy: A Framework for Simulating and Prototyping Heterogeneous Systems,” International Journal of Computer Simulation, Vol. 4, April, 1994. 201
S. S. Bhattacharyya, P. K. Murthy, and E. A. Lee, “Software Synthesis from Dataflow Graphs,” Kluwer Academic Publishers, 1996. 201
G. Kahn, “The semantics of a simple language for parallel programming,” J. L. Rosenfeld, editor, Information Processing, North-Holland Publishing Company, 1974. 201
S. Solden, “Architectural Services Modeling for Performance in HW-SW Co-Design,” Proceedings of the Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI), Japan, October, 2001. 211
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LaRue, W., Solden, S., Bhattacharya, B. (2002). Functional and Performance Modeling of Concurrency in VCC. In: Cortadella, J., Yakovlev, A., Rozenberg, G. (eds) Concurrency and Hardware Design. Lecture Notes in Computer Science, vol 2549. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-36190-1_6
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DOI: https://doi.org/10.1007/3-540-36190-1_6
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