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Efficient Hardware Multiplicative Inverters

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Information Security and Cryptology — ICISC 2002 (ICISC 2002)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 2587))

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Abstract

We propose two hardware inverters for calculating the multiplicative inverses in finite fields GF(2m): one produces a result in every O(m) time using O(m) area; and the other produces a result in every O(1) time using O(m2) area. While existing O(m)-time inverters require at least two shift registers in the datapath, the proposed O(m)-time implementation uses onlyon e, thus costing less hardware. By exploiting the idea used in the O(m)-time inverter and developing a new wayof controlling the dataflow, we also design a new O(1)-time inverter that works faster but costs less hardware than the best previouslypro posed O(1)-time implementation with the same area-time complexity.

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© 2003 Springer-Verlag Berlin Heidelberg

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Kim, HG., Oh, HC. (2003). Efficient Hardware Multiplicative Inverters. In: Lee, P.J., Lim, C.H. (eds) Information Security and Cryptology — ICISC 2002. ICISC 2002. Lecture Notes in Computer Science, vol 2587. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-36552-4_22

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  • DOI: https://doi.org/10.1007/3-540-36552-4_22

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-00716-6

  • Online ISBN: 978-3-540-36552-5

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