Abstract
We describe how to specify an executable behavioral model of hardware without specifying the hardware detail using ACL2 encapsulation. ACL2 encapsulation is a mechanism to introduce abstract functions with constraints. It can be used to specify a microarchitectural design of hardware, which can be used for early simulation and for verification. Such a high-level design can also be used as a reference model when implementing low-level designs in RTL. This paper examines two abstract specifications from a microprocessor verification project. One example is a branch predictor for a processor with speculative execution and the other is a pipelined multiplier.
Keywords
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.
This is a preview of subscription content, log in via an institution.
Buying options
Tax calculation will be finalised at checkout
Purchases are for personal use only
Learn about institutional subscriptionsPreview
Unable to display preview. Download preview PDF.
References
Jerry R. Burch and David L. Dill. Automatic verification of pipelined microprocessor control. In Computer-Aided Verification (CAV’ 94), volume 818 of LNCS, pages 68–80. Springer Verlag, 1994.
Warren A. Hunt, Jr. and Jun Sawada. The FM9801 microprocessor verification. IEEE Micro, 19(3):47–55, May/June 1999.
Matt Kaufmann and J Strother Moore. ACL2: An industrial strength version of nqthm. In Eleventh Annual Conference on Computer Assurance (COMPASS-96), pages 23–34. IEEE Computer Society Press, June 1996.
Matt Kaufmann and J Strother Moore. ACL2: A Computational Logic for Applicative Common Lisp, The User’s Manual. 1999. URL: http://www.cs.utexas.edu/users/moore/acl2/acl2-doc.html #User’s-Manual. KMM00. M. Kaufmann, P. Manolios, and J S. Moore. Computer-Aided Reasoning: An Approach. Kluwer Academic Press, 2000.
Jun Sawada. Formal Verification of an Advanced Pipelined Machine. PhD thesis, University of Texas at Austin, December 1999. Also available from http://www.cs.utexas.edu/users/sawada/dissertation/diss.html
Jun Sawada. Verification scripts for FM9801 pipelined microprocessor design, 1999. http://www.cs.utexas.edu/users/sawada/FM9801/
Patrick Schaumont, Radim Cmar, Serge Vernalde, Marc Engels, and Ivo Bolsens. Hardware reuse at the behavioral level. In Design Automation Conference (DAC’ 99), pages 552–557. ACM Press, June 1999.
Robert E. Shostak. Deciding combinations of theories. Journal of the ACM, 31(1):1–12, January 1984.
Miroslav N. Velev and Randal E. Bryant. Superscalar processor verification using efficient reductions of the logic of equality with uninterpreted functions to propositional logic. In Laurence Pierre and Thomas Kropf, editors, Correct Hardware Design and Verification Methods, (CHARME’ 99), volume 1703 of LNCS, pages 37–53. Springer Verlag, 1999.
C. E. Wallace. A suggestion for a fast multiplier. IEEE Transactions on Electronic Computers, EC-13(1):14–17, February 1964.
Dyson Wilkes and M.M. Kamal Hashmi. Application of high level interfacebased design to telecommunications system hardware. In Design Automation Conference (DAC’ 99), pages 552–557. ACM Press, June 1999.
Phillip J. Windley. The Formal Verification of Generic Interpreters. PhD thesis, University of California, Davis, jun 1990.
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2000 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Sawada, J., Hunt, W.A. (2000). Hardware Modeling Using Function Encapsulation. In: Hunt, W.A., Johnson, S.D. (eds) Formal Methods in Computer-Aided Design. FMCAD 2000. Lecture Notes in Computer Science, vol 1954. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-40922-X_15
Download citation
DOI: https://doi.org/10.1007/3-540-40922-X_15
Published:
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-41219-9
Online ISBN: 978-3-540-40922-9
eBook Packages: Springer Book Archive