Abstract
This paper presents a design for combining a reconfigurable multiplier array known as Flexible Array Blocks (FABs) and digit-serial techniques to produce arbitrary size multipliers with limited resources. Any 4M×4N bit multipliers can be implemented. In-depth evaluation of the tradeoff between resources and performance is presented. The resulting design is suitable for embedding in heterogeneous FPGA structures for fixed point DSP applications.
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References
Simon D. Haynes and Peter Y. K. Cheung, “A Reconfigurable Multiplier Array For Video Image Processing Tasks, Suitable For Embedding In An FPGA Structure”, in Proceedings IEEE Symposium on FPGAs for Custom Computing Machines, pp. 226–234, 1998.
A. Greiner and F. Pêcheux, “ALLIANCE: A complete set of CAD tools for teaching VLSI design”, 3rd Eurochip Workshop on VLSI Design Training, Grenoble, pp. 230–237, 1992.
Yun-Nan Chang, Janardhan H. Satyanarayanan, Keshap K. Parhi, “Systematic Design of High-Speed and Low-Power Digit-Serial Multipliers”, IEEE Trans. Circuits and Systems-II Analog and Digital Signal Processing, vol. 45, no. 12, December 1998.
A.R. Baugh and B.A. Wooley, “A two’s complement parallel array multiplication algorithm”, IEEE Trans. Comput., C-22,(1-2), pp. 1045–1047, 1973.
S.D. Haynes, A.B. Ferrari, P.Y.K. Cheung, “Algorithms and Structures for Reconfigurable Multiplication Units”, The XI Brazilian Symposium on Integrated Circuit Design, October 1998.
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© 2001 Springer-Verlag Berlin Heidelberg
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Visavakul, C., Cheung, P.Y.K., Luk, W. (2001). A Digit-Serial Structure for Reconfigurable Multipliers. In: Brebner, G., Woods, R. (eds) Field-Programmable Logic and Applications. FPL 2001. Lecture Notes in Computer Science, vol 2147. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-44687-7_58
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DOI: https://doi.org/10.1007/3-540-44687-7_58
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