Skip to main content
SpringerLink
Log in

Loop Transformations for Reducing Data Space Requirements of Resource-Constrained Applications

  • Conference paper
  • First Online:
Book cover Static Analysis (SAS 2003)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 2694))

Included in the following conference series:

Abstract

Embedded computing platforms are often resource constrained, requiring great design and implementation attention to memory, power and heat related parameters. An important task for a compiler in such platforms is to simplify the process of developing applications for limited memory devices and resource constrained clients. Focusing on array-intensive embedded applications, this work explores how loop-based compiler optimizations can be used for increasing memory location reuse. Our goal is to transform a given application in such a way that the resulting code has fewer cases (as compared to the original code) where the lifetimes of array elements overlap. The reduction in lifetimes of array elements can then be exploited by reusing memory locations as much as possible. Our results indicate that the proposed strategy reduces data space requirements of ten resource constrained applications by more than 40% on the average.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Log in via an institution
Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 39.99
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 54.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. N. Ahmed, N. Mateev, and K. Pingali. Synthesizing transformations for locality enhancement of imperfectly-nested loop nests. In Proc. International Conference on Supercomputing (ICS), May 2000.

    Google Scholar 

  2. S. P. Amarasinghe, J. M. Anderson, M. S. Lam, and C. W. Tseng. The SUIF compiler for scalable parallel machines. In Proc. 7 th SIAM Conference on Parallel Processing for Scientific Computing, February, 1995.

    Google Scholar 

  3. C. Ancourt and F. Irigoin. Scanning polyhedra with DO loops. In Proc. ACM Symp. on Principles of Prog. Lang. (POPL), June 1991.

    Google Scholar 

  4. D. Barthou, A. Cohen, and J-F. Collard. Maximal static expansion. In Proc. 25 th Annual ACM Symp. on Principles of Prog. Lang. (POPL), San Diego, CA, 1998.

    Google Scholar 

  5. P. Briggs. Register Allocation via Graph Coloring, PhD thesis, Rice University, Houston, TX, April 1992.

    Google Scholar 

  6. F. Catthoor, K. Danckaert, C. Kulkarni, E. Brockmeyer, P.G. Kjeldsberg, T. V. Achteren, and T. Omnes. Data Access and Storage Management for Embedded Programmable Processors, Kluwer Academic Publishers, 2002.

    Google Scholar 

  7. F. Catthoor et al. Custom Memory Management Methodology — Exploration of Memory Organization for Embedded Multimedia System Design. Kluwer Academic, 1998.

    Google Scholar 

  8. A. Fraboulet, K. Kodary, and A. Mignotte. Loop fusion for memory space optimization. In Proc. 14 th International Symposium on System Synthesis (ISSS), Montreal, Canada, September 30–October 3, 2001.

    Google Scholar 

  9. D. Gannon, W. Jalby, and K. Gallivan. Strategies for cache and local memory management by global program transformations. Journal of Parallel and Distributed Computing (JPDC), 5:587–616, 1988.

    Article  Google Scholar 

  10. P. Grun, F. Balasa, and N. Dutt. Memory size estimation for multimedia applications. In Proc. CODES/CACHE, 1998.

    Google Scholar 

  11. P. Unnikrishnan, G. Chen, M. Kandemir, M. Karakoy, and I. Kolcu. Loop Transformations for Reducing Data Space Requirements of Resource-Constrained Applications. Technical Report of CSE Department, The Pennsylvania State University, 2002.

    Google Scholar 

  12. F. Irigoin and R. Triolet. Supernode partitioning. In Proc. 15 th Annual ACM Symp. on Principles of Programming Languages (POPL), pages 319–329, 1988.

    Google Scholar 

  13. M. Kandemir. A compiler technique for improving whole program locality. In Proc. 28 th Annual ACM Symposium on Principles of Programming Languages (POPL), London, UK, January, 2001.

    Google Scholar 

  14. K. Kennedy and K. S. McKinley. Maximizing loop parallelism and improving data locality via loop fusion and distribution. In Proc. Workshop on Languages and Compilers for Parallel Computing (LCPC), pp. 301–321, Oregon, Aug 1993.

    Google Scholar 

  15. K. Knobe and V. Sarkar. Array SSA form and its use in parallelization. In Proc. 15 th Annual ACM Symposium on Principles of Programming Languages (POPL), pages 107–120, 1998.

    Google Scholar 

  16. V. Lefebvre and P. Feautrier. Automatic storage management for parallel programs. Research report PRiSM 97/8, France, 1997.

    Google Scholar 

  17. W. Li. Compiling for NUMA Parallel Machines. Ph.D. Thesis, Computer Science Department, Cornell University, Ithaca, New York, 1993.

    Google Scholar 

  18. D. E. Maydan, S. P. Amarasinghe, and M. S. Lam. Array dataflow analysis and its use in array privatization. In Proc. Annual ACM Symposium on Principles of. Programming Languages (POPL), pages 2–15, January 1993.

    Google Scholar 

  19. K. McKinley, S. Carr, and C.-W. Tseng. Improving data locality with loop transformations. ACM Transactions on Programming Languages and Systems (TOPLAS), 18(4):424–453, July 1996.

    Article  Google Scholar 

  20. MIPSpro Family of Compilers. http://www.sgi.com/developers/devtools/languages/mipspro.html.

    Google Scholar 

  21. W. Pugh and D. Wonnacott. An exact method for analysis of value-based array data dependences. In Proc. 6 th Workshop on Languages and Compilers for Parallel Computing (LCPC), Portland, Aug 1993.

    Google Scholar 

  22. Y. Song, R. Xu, C. Wang, and Z. Li. Data locality enhancement by memory reduction. In Proc. 15 th ACM International Conference on Supercomputing (ICS), June, 2001.

    Google Scholar 

  23. M. Strout, L. Carter, J. Ferrante, and B. Simon. Schedule-independent storage mapping in loops. In Proc. ACM Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), October, 1998.

    Google Scholar 

  24. W. Thies, F. Vivien, J. Sheldon, and S. Amarasinghe, A unified framework for schedule and storage optimization. In Proc. the SIGPLAN Conference on Programming Language Design and Implementation, Snowbird, UT, June, 2001.

    Google Scholar 

  25. P. Tu and D. Padua. Automatic array privatization. In Proc. 6 th Workshop on Languages and Compilers for Parallel Computing (LCPC), Lecture Notes in Computer Science, pages 500–521, Portland, OR, August 1993.

    Google Scholar 

  26. D. Wilde and S. Rajopadhye. Memory reuse analysis in the polyhedral model. Parallel Processing Letters, 1997.

    Google Scholar 

  27. M. Wolf and M. Lam. A data locality optimizing algorithm. In Proc. ACM SIGPLAN 91 Conference on Programming Language Design and Implementation (PLDI), pages 30–44, June 1991.

    Google Scholar 

  28. M. Wolfe. High Performance Compilers for Parallel Computing, Addison-Wesley Publishing Company, 1996.

    Google Scholar 

  29. Y. Zhao and S. Malik. Exact memory size estimation for array computations without loop unrolling. In Proc. ACM/IEEE Design Automation Conference (DAC), June 1999.

    Google Scholar 

Download references

Author information

Authors and Affiliations

  1. CSE Department, Pennsylvania State University, University Park, PA, 16802, USA

    Priya Unnikrishnan, Guangyu Chen & Mahmut Kandemir

  2. Department of Computing, Imperial College, London, SW7 2AZ, UK

    Mustafa Karakoy

  3. Computation Department, UMIST Manchester, M60 1QD, UK

    Ibrahim Kolcu

Authors
  1. Priya Unnikrishnan
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. Guangyu Chen
    View author publications

    You can also search for this author in PubMed Google Scholar

  3. Mahmut Kandemir
    View author publications

    You can also search for this author in PubMed Google Scholar

  4. Mustafa Karakoy
    View author publications

    You can also search for this author in PubMed Google Scholar

  5. Ibrahim Kolcu
    View author publications

    You can also search for this author in PubMed Google Scholar

Editor information

Editors and Affiliations

  1. École Polytechnique, STIX, 91128, Palaiseau cedex, France

    Radhia Cousot

Rights and permissions

Reprints and permissions

Copyright information

© 2003 Springer-Verlag Berlin Heidelberg

About this paper

Cite this paper

Unnikrishnan, P., Chen, G., Kandemir, M., Karakoy, M., Kolcu, I. (2003). Loop Transformations for Reducing Data Space Requirements of Resource-Constrained Applications. In: Cousot, R. (eds) Static Analysis. SAS 2003. Lecture Notes in Computer Science, vol 2694. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-44898-5_22

Download citation

  • DOI: https://doi.org/10.1007/3-540-44898-5_22

  • Published:

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-40325-8

  • Online ISBN: 978-3-540-44898-3

  • eBook Packages: Springer Book Archive

Publish with us

Policies and ethics

Search

Navigation