Skip to main content
SpringerLink
Log in
Book cover

International Conference on Vector and Parallel Processing

VECPAR 2000: Vector and Parallel Processing — VECPAR 2000 pp 181–195Cite as

Value Prediction as a Cost-Effective Solution to Improve Embedded Processors Performance

  • Conference paper
  • First Online:

  • 2704 Accesses

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 1981))

Abstract

The growing market of embedded systems and applications has led to the making of more general embedded processors, with some features traditionally associated with general-purpose microprocessors. Following this trend, recent research has tried to incorporate into embedded processors the newest techniques to break down ILP limits. Value speculation is a recent technique not yet considered in the context of embedded processors, and the goal of the present work is to analyse the performance potential of this technique within this scope.

This is a preview of subscription content, log in via an institution.

Chapter
USD   29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD   39.99
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD   54.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Learn about institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. M. Schalett, “Trends in Embedded-Microprocessors Design”, IEEE Computer, pp. 44–49, Aug. 1998.

    Google Scholar 

  2. J. Choquette, M. Gupta, D. McCarthy and J. Veenstra, “High-Performance RISC Microprocessors”, IEEE Micro, Vol. 19, Num. 4, pp. 48–55, Jul./Aug. 1999.

    Google Scholar 

  3. D. Connors, J. Puiatti, D. August, K. Crozier and W. Hwu, “An Architecture Framework for Introducing Predicated Execution into Embedded Microprocessors”, Proc. of the 5th International Euro-par Conference, Aug. 1999.

    Google Scholar 

  4. Y. Sazeides, J.E. Smith, “The Predictability of Data Values,” Proc. of 30th Int. Symp. on Microarchitecture (MICRO-30), pp. 248–258, Dec. 1997.

    Google Scholar 

  5. B. Calder, G. Reinman and D.M. Tullsen, “Selective Value Prediction”, Proc. of the 26th Int. Symp. on Computer Architecture, May. 1999.

    Google Scholar 

  6. C. Lee and W. Mangione-Smith, “MediaBench: A Tool for Evaluating and Synthesizing Multimedia and Communications Systems”, Proc. of the 30th Int. Symp. on Microarchitecture (MICRO-30), pp. 330–335, Dec. 1997.

    Google Scholar 

  7. M.H. Lipasti and J.P. Shen, “Exceeding the Dataflow Limit via Value Prediction,” Proc. of the 29th Int. Symp. on Microarchitecture (MICRO-29), pp. 226–237, Dec. 1996.

    Google Scholar 

  8. K. Wang and M. Franklin, “Highly Accurate Data Value Prediction using Hybrid Predictors,” Proc. of 30th Int. Symp. on Microarchitecture (MICRO-30), pp. 281–290, Dec. 1997.

    Google Scholar 

  9. T. Nakra, R. Gupta, M.L. Soffa, “Global Context-Based Value Prediction”, Proc. of the 5th Int. Symp. On High Performance Computer Architecture (HPCA-5), Jan. 1999

    Google Scholar 

  10. B. Rychlik, J. Faisty, B. Krug, J.P. Shen, “Efficacy and Performance Impact of Value Prediction”, PACT-98

    Google Scholar 

  11. L. Piñuel, R.A. Moreno and F. Tirado, “Implementation of hybrid context-based value predictors using value sequence classification”. Proc. of the 5th International Euro-par Conference, Aug. 1999.

    Google Scholar 

  12. F. Gabbay and A. Mendelson, “Improving Achievable ILP Trough Value Prediction and Program Profiling”, Microprocessores and Microsystems, Vol 22, n.3, Sept. 1998.

    Google Scholar 

  13. D. Burger and T.M. Austin. “The SimpleScalar Tool Set, Version 2.0”. Technical Report CS#1342, University of Wisconsin-Madison, 1997.

    Google Scholar 

  14. Y. Sazeides, J. E. Smith, “Implementations of Context Based Value Predictors”. Technical Report #ECE-TR-97-8, University of Wisconsin-Madison, 1997.

    Google Scholar 

  15. J. Daemen, L. Knudsen and V. Rijmen, “The Block Cipher SQUARE”, Workshop for Fast Software Encryption, 1997

    Google Scholar 

  16. R. Moreno, “Using value prediction as a complexity-effective solution to improve performance”, Technical Report 5/98, Dep. de Arquitectura de Computadores, Universidad Complutense de Madrid, Dec. 1998.

    Google Scholar 

  17. G.S. Sohi, “Instruction Issue Logic for High-Performance, Interrumpible, Multiple Functional Unit, Pipelined Computers”, IEEE Trans. on Computer, 39(3), pp. 349–359, 1990

    Article  Google Scholar 

Download references

Author information

Authors and Affiliations

  1. Departamento de Arquitectura de Computadores y Automática, Universidad Complutense de Madrid, Avd. Complutense s/n, 28040, Madrid, Spain

    Silvia Del Pino, Luis Piñuel, Rafael A. Moreno & Francisco Tirado

Authors
  1. Silvia Del Pino
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. Luis Piñuel
    View author publications

    You can also search for this author in PubMed Google Scholar

  3. Rafael A. Moreno
    View author publications

    You can also search for this author in PubMed Google Scholar

  4. Francisco Tirado
    View author publications

    You can also search for this author in PubMed Google Scholar

Editor information

Editors and Affiliations

  1. Faculdade de Engenharia da Universidade do Porto, Rua Dr. Roberto Frias, 4200-465, Porto, Portugal

    José M. L. M. Palma

  2. Department of Computer Science, University of Tennessee, 37996-1301, Knoxville, TN, USA

    Jack Dongarra

  3. Departamento de Sistemas Informáticos y Computación, Universidad Politécnica de Valencia, Camino de Vera, s/n, Apartado 22012, E-46020, Valencia, Spain

    Vicente Hernández

Rights and permissions

Reprints and permissions

Copyright information

© 2001 Springer-Verlag Berlin Heidelberg

About this paper

Cite this paper

Del Pino, S., Piñuel, L., Moreno, R.A., Tirado, F. (2001). Value Prediction as a Cost-Effective Solution to Improve Embedded Processors Performance. In: Palma, J.M.L.M., Dongarra, J., Hernández, V. (eds) Vector and Parallel Processing — VECPAR 2000. VECPAR 2000. Lecture Notes in Computer Science, vol 1981. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-44942-6_14

Download citation

  • DOI: https://doi.org/10.1007/3-540-44942-6_14

  • Published:

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-41999-0

  • Online ISBN: 978-3-540-44942-3

  • eBook Packages: Springer Book Archive

Publish with us

Policies and ethics

Search

Navigation