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Low Power Design Techniques for Contactless Chipcards

  • Conference paper
  • First Online:
Book cover Integrated Circuit Design (PATMOS 2000)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 1918))

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Abstract

The history of chipcards begun in the eighties of the last century. The first chips consist of a non-volatile memory (NVM), a serial I/O-channel and a finite state machine, offering the necessary security to enable only secure access to the stored data. The memory size was in the range of some 10 to 100 bytes, the clock rate around 200 KHz and the power consumption more than 100 mA @ 5V.

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© 2000 Springer-Verlag Berlin Heidelberg

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Sedlak, H. (2000). Low Power Design Techniques for Contactless Chipcards. In: Soudris, D., Pirsch, P., Barke, E. (eds) Integrated Circuit Design. PATMOS 2000. Lecture Notes in Computer Science, vol 1918. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-45373-3_21

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  • DOI: https://doi.org/10.1007/3-540-45373-3_21

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-41068-3

  • Online ISBN: 978-3-540-45373-4

  • eBook Packages: Springer Book Archive

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