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International Conference on Evolvable Systems

ICES 2001: Evolvable Systems: From Biology to Hardware pp 140–150Cite as

Multi-layered Defence Mechanisms: Architecture, Implementation and Demonstration of a Hardware Immune System

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Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 2210))

Abstract

Biology uses numerous methods to keep the body in good working operation. If one line of defence is breached, the next uses a different approach. Very rarely are all lines of defence evaded. This paper analyses the body’s approach to fault tolerance using the immune system and shows how such techniques can be applied to hardware fault tolerance. A fault detection layer inspired by the process of self/nonself discrimination used to detect bacterial infections in the body is created. The hardware immune system is then demonstrated to show how such a layer in hardware can provide fault detection.Biology uses numerous methods to keep the body in good working operation. If one line of defence is breached, the next uses a different approach. Very rarely are all lines of defence evaded. This paper analyses the body’s approach to fault tolerance using the immune system and shows how such techniques can be applied to hardware fault tolerance. A fault detection layer inspired by the process of self/nonself discrimination used to detect bacterial infections in the body is created. The hardware immune system is then demonstrated to show how such a layer in hardware can provide fault detection.

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Author information

Authors and Affiliations

  1. Department of Electronics, University of York, Heslington, York, England

    D. W. Bradley & A. M. Tyrrell

Authors
  1. D. W. Bradley
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  2. A. M. Tyrrell
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Editor information

Editors and Affiliations

  1. University of Aizu, Tsuruga, Ikki-machi, Aizu-Wakamatsu City, Fukushima, 965-8580, Japan

    Yong Liu

  2. Faculty of Engineering, Shinshu University, 4-17-1 Wakasato, Nagano, 380-8553, Japan

    Kiyoshi Tanaka

  3. Nat. Inst. of Adv. Ind. Science and Technology, Adv. Semiconductor Research Center, AIST Tsukuba Central 2, 1-1-1 Umezono, Tsukuba, Ibaraki, 305-8568, Japan

    Masaya Iwata  & Tetsuya Higuchi  & 

  4. University of Tsukuba, Institute of Information Sciences and Electronics, Tsukuba, Ibaraki, 305-8573, Japan

    Moritoshi Yasunaga

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© 2001 Springer-Verlag Berlin Heidelberg

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Bradley, D.W., Tyrrell, A.M. (2001). Multi-layered Defence Mechanisms: Architecture, Implementation and Demonstration of a Hardware Immune System. In: Liu, Y., Tanaka, K., Iwata, M., Higuchi, T., Yasunaga, M. (eds) Evolvable Systems: From Biology to Hardware. ICES 2001. Lecture Notes in Computer Science, vol 2210. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-45443-8_12

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  • DOI: https://doi.org/10.1007/3-540-45443-8_12

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-42671-4

  • Online ISBN: 978-3-540-45443-4

  • eBook Packages: Springer Book Archive

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