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On Trace Assertion Method of Module Interface Specification with Concurrency

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Rough Sets and Current Trends in Computing (RSCTC 2000)

Part of the book series: Lecture Notes in Computer Science ((LNAI,volume 2005))

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Abstract

The trace assertion method is a formal state machine based method for specifying module interfaces [1],[9][1, 9]. It can be seen as an alternative to algebraic specification technique. We extend the sequential model presented in [9][9] by allowing simple concurrency.

Partially supported by NSERC and CITO Research Grants

current affiliation: Motorola, 1501 West Shure Dr., Arlington Heights, Illinois 60004, USA

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References

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Author information

Authors and Affiliations

  1. Department of Computing and Software, McMaster University, ON, L8S 4K1, Hamilton, Canada

    Ryszard Janicki & Yan Liu

Authors
  1. Ryszard Janicki
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  2. Yan Liu
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Editor information

Editors and Affiliations

  1. Department of Computer Science, University of Regina Regina, S4S 0A2, Saskatchewan, Canada

    Wojciech Ziarko  & Yiyu Yao  & 

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Janicki, R., Liu, Y. (2001). On Trace Assertion Method of Module Interface Specification with Concurrency. In: Ziarko, W., Yao, Y. (eds) Rough Sets and Current Trends in Computing. RSCTC 2000. Lecture Notes in Computer Science(), vol 2005. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-45554-X_80

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  • DOI: https://doi.org/10.1007/3-540-45554-X_80

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-43074-2

  • Online ISBN: 978-3-540-45554-7

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