Abstract
Embedded systems consisting of the application program ROM, RAM, the embedded processor core, and any custom hardware on a single wafer are becoming increasingly common in application domains such as signal processing. Given the rapid deployment of these systems, programming on such systems has shifted from assembly language to high-level languages such as C, C++, and Java. The processors used in such systems are usually targeted toward specific application domains, e.g., digital signal processing (DSP). As a result, these embedded processors include application-specific instruction sets, complex and irregular data paths, etc., thereby rendering code generation for these processors difficult. In this paper, we present new code optimization techniques for embedded fixed point DSP processors which have limited on-chip program ROM and include indirect addressing modes using post-increment and decrement operations. We present a heuristic to reduce code size by taking advantage of these addressing modes. Our solution aims at improving the offset assignment produced by Liao et al.’s solution. It finds a layout of variables in RAM, so that it is possible to subsume explicit address register manipulation instructions into other instructions as a post-increment or post-decrement operation. Experimental results show the effectiveness of our solution.
Acknowledgments
The work of J. Ramanujam is supported in part by an NSF grant CCR-0073800 and by NSF Young Investigator Award CCR-9457768.
This is a preview of subscription content, log in via an institution.
Buying options
Tax calculation will be finalised at checkout
Purchases are for personal use only
Learn about institutional subscriptionsPreview
Unable to display preview. Download preview PDF.
References
S. Atri. Improved Code Optimization Techniques for Embedded Processors. M.S. Thesis, Department of Electrical and Computer Engineering, Louisiana State University, December 1999.
D. Bartley. Optimizing Stack Frame Accesses for Processors with Restricted Addressing Modes. Software-Practice and Experience, 22(2):101–110, Feb. 1992.
T. H. Cormen, C. E. Leiserson, and R. L. Rivist. Introduction to Algorithms.MIT Press, 1990.
R. Leupers and P. Marwedel. Algorithms for address assignment in DSP code generation. In Proc. International Conference on Computer Aided Design, pages 109–112, Nov. 1996.
S. Y. Liao, Code Generation and Optimization for Embedded Digital Signal Processors, Ph.D. Thesis. MIT, June 1996.
S. Y. Liao, S. Devadas, K. Keutzer and S. Tjiang, and A. Wang. Storage Assignment to Decrease code Size Optimization. In Proc. 1995 ACM SIGPLAN Conference on Programming Language Design and Implementation. pages 186–195, June 1995.
S. Liao, S. Devadas, K. Keutzer, S. Tjiang, A. Wang, G. Araujo, A. Sudarsanam, S. Malik, V. Zivojnovic and H. Meyr. Code Generation and Optimization Techniques for Embedded Digital Signal Processors. In Hardware/Software Co-Design, Kluwer Acad. Pub., G. De Micheli and M. Sami, Editors, 1995.
P. Marwedel and G. Goossens, editors. Code Generation for Embedded Processors, Kluwer Acad. Pub., 1995.
G. De Micheli. Synthesis and Optimization of Digital Circuits. McGraw-Hill 1994.
S. S. Muchnick. Advanced Compiler Design Implementation. Morgan Kaufmann Publishers, San Francisco, CA, 1997.
D. A. Patterson and J. L. Hennessy. Computer Architecture: A Quantitative Approach. Morgan Kaufmann Publishers, San Mateo, CA, 1990.
P. G. Paulin, M. Cornero, C. Liem et al. Trends in Embedded System Technology, an Industrial Perspective. Hardware/Software Co-Design, M. Giovanni M. Sami, editors. Kluwer Acad. Pub., 1996.
Amit Rao and Santosh Pande. Storage assignment optimizations to generate compact and efficient code on embedded DSPs. Proc. 1999 ACMSIGPLAN Conference on Programming Language Design and Implementation. pages 128–138, June 1999.
A. Sudarsanam, S. Liao, and S. Devadas. Analysis and Evaluation of Address Arithmetic Capabilities if Custom DSP Architectures. In Proceedings of 1997 ACM/IEEE Design Automation Conference. pages 297–292, 1997.
A. Sudarsanam and S. Malik. Memory Bank and Register Allocation in Software Synthesis for ASIPs. In Proceedings of 1995 International Conference on Computer-Aided Design. pages. 388–392, 1995.
A. Sudarsanam, S. Malik, S. Tjiang, and S. Liao. Optimization of Embedded DSP Programs Using Post-pass Data-flow Analysis. In Proceedings of 1997 International Conference on Acoustics, Speech, and Signal Processing.
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2001 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Atri, S., Ramanujam, J., Kandemir, M. (2001). Improving Offset Assignment for Embedded Processors. In: Midkiff, S.P., et al. Languages and Compilers for Parallel Computing. LCPC 2000. Lecture Notes in Computer Science, vol 2017. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-45574-4_11
Download citation
DOI: https://doi.org/10.1007/3-540-45574-4_11
Published:
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-42862-6
Online ISBN: 978-3-540-45574-5
eBook Packages: Springer Book Archive