Verification Methods for Weaker Shared Memory Consistency Models

Abstract

The problem of verifying finite-state models of shared memory multiprocessor coherence protocols for conformance to weaker memory consistency models is examined. We start with W.W. Collier’s architectural testing methods and extend it in several non-trivial ways in order to be able to handle weaker memory models. This, our first contribution, presents the construction of architectural testing programs similar to those constructed by Collier (e.g. the Archtest suite) suited for weaker memory models. Our on primary emphasis has, how ever, been to adapt these methods to the realm of model-checking. In an earlier effort (joint work with Nalumasu and Mokkedem), we had demonstrated how to adapt Collier’s architectural testing methods to model-checking. Our verification approach consisted of abstracting executions that violate memory orderings into a fixed collection of automata (called Test Automata) that depend only on the memory model. The main advantage of this approach, called Test Model-checking, is that the test automata remain fixed during the iterative design cycle when different coherence protocols that (presumably) implement a given memory model are being compared for performance. This facilitates ‘push-button’ re-verification when each new protocol is being considered. Our second contribution is to extend the methods of constructing test automata to be able to handle architectural tests for weaker memory models. After reviewing prior work, in this paper we mainly focus on architectural tests for weaker memory models and the new abstraction methods thereof to construct test automata for weaker memory models.

The author is currently at Intel, Oregon and was at University of Utah during the course of the research work presented here.

Supported in part by NSF Grant No. CCR-9800928.