Abstract
Until now, the lack of software and hardware compatibility between existing reconfigurable processors make them less competitive with hard-wired processors for mainstream computing. In this paper we propose a reconfigurable processor architecture based on the von-Neumann computing model, so that software compatibility can be achieved with minimal work. Furthermore, the proposed processor takes advantage of key features of some FPGAs like partial and dynamic reconfiguration to load on-the-fly a variable number of different coarse-grained execution units.
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© 2002 Springer-Verlag Berlin Heidelberg
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Niyonkuru, A., Eggers, G., Zeidler, H.C. (2002). A Reconfigurable Processor Architecture. In: Glesner, M., Zipf, P., Renovell, M. (eds) Field-Programmable Logic and Applications: Reconfigurable Computing Is Going Mainstream. FPL 2002. Lecture Notes in Computer Science, vol 2438. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-46117-5_131
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DOI: https://doi.org/10.1007/3-540-46117-5_131
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