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Modular, Fabric-Specific Synthesis for Programmable Architectures

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Field-Programmable Logic and Applications: Reconfigurable Computing Is Going Mainstream (FPL 2002)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 2438))

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Abstract

Traditionally, programmable fabrics consist of look up table (LUT) based programmable logicb locks (PLBs). Typically, the PLBs are either homogeneous (consisting of LUTs of the same size), or heterogeneous (consisting of LUTs of varying sizes). To bridge the costperformance gap between ASICs and FPGAs, several new programmable logic fabrics are employing highly heterogeneous PLB architectures, consisting of a combination of LUTs of varying sizes, MUXes, logic gates, and versatile local routing architectures. Currently, there are two possible approaches to Synthesis for such fabrics. In the generic Synthesis approach, the first step of technology mapping generates a netlist of functions that can be implemented by individual logic elements of a PLB, like LUTs, MUXes and logic gates. The second step of packing clusters these functions into groups of logic that can fit in a single PLB. The second approach constructs a library of certain PLB configurations (like a standard cell library) and performs library based technology mapping, followed by packing. In this paper, we show that both these approaches result in sub-optimal and uneven fabricu tilization for two reasons: (a) a lack of fabric-specific knowledge; (b) a lack of integration between mapping and packing. We present a new, modular, Synthesis approach, consisting of a fabric-specific technology mapping algorithm which maps directly to the entire PLB, rather than individual logic elements. In this manner, the new approach integrates the steps of mapping and packing, resulting in higher fabricu tilization. Using the highly heterogeneous eASIC PLB as an example, we demonstrate that our approach requires 22% and 24% fewer PLBs than the generic and library based Synthesis approaches, across a standard benchmark set. We also demonstrate the modularity of our approach, by comparing three PLB architectures. Our results show that highly heterogeneous PLBs are much more area efficient than homogeneous PLBs.

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References

  1. J. He, J. Rose: Technology Mapping for Heterogenous FPGAs ACM International Workshop, FPGA, Monterey CA, Feb. 1994

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© 2002 Springer-Verlag Berlin Heidelberg

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Koorapaty, A., Pileggi, L. (2002). Modular, Fabric-Specific Synthesis for Programmable Architectures. In: Glesner, M., Zipf, P., Renovell, M. (eds) Field-Programmable Logic and Applications: Reconfigurable Computing Is Going Mainstream. FPL 2002. Lecture Notes in Computer Science, vol 2438. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-46117-5_15

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  • DOI: https://doi.org/10.1007/3-540-46117-5_15

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-44108-3

  • Online ISBN: 978-3-540-46117-3

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