Abstract
This paper dealsw ith cryptographic concepts. It presents a hardware FPGA implementation of linear cryptanalysis of DES1. Linear cryptanalysis is the best attack known able to break DES faster than exhaustive search. Matsui’s original attack [4, 5] could not be applied as such, and we had to implement a modified attack [1] to face hardware constraints. The resulting attack is less efficient than Matsui’s attack, but fits in our hardware and breaksa DES key in 12-15 hours on one single FPGA, therefore becoming the first practical implementation to our knowledge. As a comparison, the fastest implementation known so far used the idle time of 18 Intel Pentium III MMX, and broke a DES key in 4.32 days.
Our fast implementation made it possible for us to perform practical tests, allowing a comparison with theoretical estimations.
DES : Data Encryption Standard, the old U.S. cipher standard
This is a preview of subscription content, log in via an institution.
Buying options
Tax calculation will be finalised at checkout
Purchases are for personal use only
Learn about institutional subscriptionsPreview
Unable to display preview. Download preview PDF.
References
L.R. Knudsen and J.E. Mathiassen A Chosen-Plaintext Linear Attack on DES. In Bruce Schneier, editor, Proc. of FSE’00, LNCS, pages 262–272. Springer, 2000.
P. Junod. Linear cryptanalysis of DES. Master’s thesis, Swiss Institute of Technology, Zurich, 2000.
P. Junod. On the complexity of Matsui’s attack. In Proc. of SAC’01, LNCS, pages 216–230. Springer, 2001.
M. Matsui. Linear cryptanalysis method for DES cipher. In Tor Helleseth, editor, Advances in Cryptology-EuroCrypt’93, pages 386–397, Berlin, 1993. Springer-Verlag. Lecture Notesin Computer Science Volume 765.
M. Matsui. The first experimental cryptanalysis of the Data Encryption Standard. In Yvo Desmedt, editor, Advances in Cryptology-Crypto’94, pages 1–11, Berlin, 1994. Springer-Verlag. Lecture Notesin Computer Science Volume 839.
J.M. Rabaey. Digital Integrated Circuits. Prentice Hall, 1996.
Xilinx. Virtex 2.5V field programmable gate arraysd ata sheet. available from http://www.xilinx.com.
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2002 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Koeune, F., Rouvroy, G., Francois-Xavier, S., Jean-Jacques, Q., Jean-Pierre, D., Jean-Didier, L. (2002). An FPGA Implementation of the Linear Cryptanalysis. In: Glesner, M., Zipf, P., Renovell, M. (eds) Field-Programmable Logic and Applications: Reconfigurable Computing Is Going Mainstream. FPL 2002. Lecture Notes in Computer Science, vol 2438. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-46117-5_87
Download citation
DOI: https://doi.org/10.1007/3-540-46117-5_87
Published:
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-44108-3
Online ISBN: 978-3-540-46117-3
eBook Packages: Springer Book Archive