Abstract
We address the problem of verifying safety and liveness properties for infinite-state systems, using symbolic reachability analysis. The models we consider are fair parametric extended automata, i.e., counter automata with parametric guards, supplied with fairness conditions on their transitions. In previous work, we shown that symbolic reachability analysis using acceleration techniques can be used to generate finite abstractions (symbolic graphs) of the original infinite-state model. In this paper, we show that this analysis can be also used to introduce fairness conditions on the generated abstract model allowing to model-check liveness properties. We show first how to translate faithfully the fairness conditions of the infinite-state original model to conditions on the generated finite symbolic graph. Then, we show that we can also synthesize automatically new fairness conditions allowing to eliminate infinite paths in the symbolic graph which do not correspond to valid behaviours in the original model. These infinite paths correspond to abstractions of boundedly iterable (nested) loops. We show techniques allowing to decide this bounded iterability for a class of components in the symbolic graph. We illustrate the application of these techniques to nontrivial examples.
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References
P. Abdulla, A. Annichini, and A. Bouajjani. Symbolic verification of lossy channel systems: Application to the bounded retransmission protocol. In Proceedings of 5th TACAS, volume 1579 of LNCS. Springer Verlag, 1999.
P. Abdulla, A. Bouajjani, B. Jonsson, and M. Nilsson. Handling global conditions in parametrized system verification. In Proceedings of 11th CAV, volume 1633 of LNCS. Springer Verlag, 1999.
P.A. Abdulla, A. Bouajjani, and B. Jonsson. On-the-fly analysis of systems with unbounded, lossy, FIFO channels. In Proceedings of the 10th CAV, volume 1427 of LNCS, pages 305–317. Springer Verlag, 1998.
R. Alur and D.L. Dill. A theory of timed automata. Theoretical Computer Science, 126:183–235, 1994.
A. Annichini, E. Asarin, and A. Bouajjani. Symbolic techniques for parametric reasoning about counter and clock systems. In E.A. Emerson and A.P. Sistla, editors, Proceedings of the 12th CAV, volume 1855 of LNCS, pages 419–434. Springer Verlag, July 2000.
K. Baukus, Y. Lakhnech, and K. Stahl. Verifying universal properties of parameterized networks. In Proceedings of FTRTFT, 2000.
B. Boigelot, P. Godefroid, B. Willems, and P. Wolper. The power of qdds. In Proceedings of SAS’97, volume 1302 of LNCS. Springer Verlag, 1997.
Boigelot and P. Wolper. Symbolic verification with periodic sets. In Proceedings of the 6th CAV, volume 818 of LNCS. Springer Verlag, 1994.
A. Bouajjani and P. Habermehl. Symbolic reachability analysis of fifo-channel systems with nonregular sets of configurations. In Proceedings of ICALP’97, LNCS. Springer Verlag, 1997.
A. Bouajjani, B. Jonsson, M. Nilsson, and T. Touili. Regular model checking. In E.A. Emerson and A.P. Sistla, editors, Proceedings of the 12th CAV, volume 1855 of LNCS, pages 403–418, July 2000.
M. Colon and H. Sipma. Synthesis of linear ranking functions. In Proceedings of TACAS’01, 2001.
D. Dams, R. Gerth, and O. Grumberg. A heuristic for the automatic generation of ranking functions. In Proceedings of WAVe, pages 1–8, 2000.
D. Dill. Timing assumptions and verification of finite-state concurrent systems. In J. Sifakis, editor, Proceedings of the 1st CAV, volume 407 of LNCS, pages 197–212. Springer Verlag, 1989.
R.W. Floyd. Assigning meanings to programs. In In. Proc. Symp. on Appl. Math. 19, pages 19–32. American Mathematical Society, 1967.
A.C. Hearn. REDUCE-User’s and Contributed Packages Manual. Codemist Ltd., February 1999. version 3.7.
Z. Manna and A. Pnueli. Completing the temporal picture. Theoretical Computer Science, 83(1):97–130, 1991.
Omega Team. The Omega Library, November 1996. version 1.1.0.
A. Pnueli and E. Shahar. Liveness and acceleration in parametrized verification. In Proceedings of the 12th CAV, volume 1855. Springer Verlag, 2000.
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Bouajjani, A., Collomb-Annichini, A., Lakhnech, Y., Sighireanu, M. (2001). Analyzing Fair Parametric Extended Automata. In: Cousot, P. (eds) Static Analysis. SAS 2001. Lecture Notes in Computer Science, vol 2126. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-47764-0_19
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DOI: https://doi.org/10.1007/3-540-47764-0_19
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