Abstract
Dynamic register renaming is a mechanism present in many high performance microprocessors of latest generation aimed at removing false dependencies from the code. Unfortunately, in many cases, this mechanism keeps busy more registers than the necessary. In this paper we introduce a novel technique, called Selective Register Renaming, in which the compiler helps the processor to save physical registers when the hardware renames registers. The paper explains the principles of this technique and shows its effects on several Livermore Kernel Loops.
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© 2001 Springer-Verlag Berlin Heidelberg
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Zingirian, N., Maresca, M. (2001). Selective Register Renaming: A Compiler-Driven Approach to Dynamic Register Renamin. In: Hertzberger, B., Hoekstra, A., Williams, R. (eds) High-Performance Computing and Networking. HPCN-Europe 2001. Lecture Notes in Computer Science, vol 2110. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-48228-8_35
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DOI: https://doi.org/10.1007/3-540-48228-8_35
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