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PIO: Parallel I/O System for Massively Parallel Processors

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Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 2110))

Abstract

In this paper, we propose a parallel I/O system utilizing parallel commodity network attached to multiple I/O processors of parallel processing systems. I/O requests from user application are automatically distributed to parallel I/O channels to achieve the best utilization of parallel network, and the system provides highly scalable performance according to the number of channels. We also provides an API for easy user-level programming and a set of utilities for high-speed data transfer and real-time parallelized visualization based on it.

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References

  1. Watson, R.W., Coyne, R.A.: The Parallel I/O Architecture of the High-Performance Storage System (HPSS), Proc. of the 1995 IEEE MSS Symposium, 1995.

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  6. Boku, T., Itakura, K., Nakamura, H., Nakazawa, K.: CP-PACS: A massively parallel processor for large scale scientific calculations, Proc. of ICS’97, 1997.

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  7. Advanced Visual Systems Inc.: AVS/Express, http://www.avs.com/software/soft_t/avsxps.html

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© 2001 Springer-Verlag Berlin Heidelberg

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Boku, T., Matsubara, M., Itakura, K. (2001). PIO: Parallel I/O System for Massively Parallel Processors. In: Hertzberger, B., Hoekstra, A., Williams, R. (eds) High-Performance Computing and Networking. HPCN-Europe 2001. Lecture Notes in Computer Science, vol 2110. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-48228-8_39

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  • DOI: https://doi.org/10.1007/3-540-48228-8_39

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-42293-8

  • Online ISBN: 978-3-540-48228-4

  • eBook Packages: Springer Book Archive

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