Abstract
The consortium of Bull, ECRC, ICL, Siemens and their associates is currently designing a 256 Processing Element machine and, by 1992, will have built three prototypes; to date the definitive specification has been produced. This paper describes the hardware architecture and system support necessary for a distributed store architecture; in particular the areas of message passing and store copying are considered.
This is a preview of subscription content, log in via an institution to check access.
Preview
Unable to display preview. Download preview PDF.
6 References
U. Baron, J. Chassin de Kergommeaux, M. Hailperin, M. Ratcliffe, P. Robert, J-C. Syre and H. Westphal. The Parallel ECRC Prolog System PEPSys: An Overview and Evaluation Results, Proc. FGCS'88, Tokyo, Int. Conf. on Fifth Generation Comput. Sys., (Nov-Dec 1988).
B. Bergsten and R. Gonzalez-Rubio. A Database Accelerator and its Languages, CONPAR 88, BCS Workshop Series, CUP, pp. 63–71, (1988).
S.J. Cockroft and M. Ward. Performance Aspects of the EDS Parallel Processing Machine, Proc. UKCMG, Glasgow, (21–24 May 1990).
P. Kermani and L. Kleinrock. Virtual Cut-through: A new Computer Communication Switching Technique, Comput. Networks 3(4), pp. 267–286, (Sept 1979).
J.H. Patel. Processor-Memory Interconnections for multi-processors, Proc. 6th Annual Symp. Comput. Arch., pp. 343–354, (1988).
B.J. Proctor and C.J. Skelton. Flagship is Nearing Port: A Status Report on the Alvey Stage of the Project, CONPAR 88, BCS Workshop Series, CUP, pp. 100–107, (1988).
R. Rashid, A. Tevanian, M. Young, D. Golub, R. Baron, D. Black, W.J. Bolosky and J. Chew. Machine-Independent Virtual Memory Management for Paged Uniprocessor and Multiprocessor Architectures, IEEE Trans. Comput., 7(8), pp. 896–908, (Aug 1985).
M. Ratcliffe and J-C. Syre. The PEPSys Parallel Logic Programming Language, Proc. IJCAI, Milano, Italy, (Aug 1987).
M. Rozier, V. Abrossimov, F. Armand, I. Boule, M. Gien, M. Guillemont, F. Herrmann, C. Kaiser, S. Langlois, P. Leonard and W. Neuhauser. CHORUS Distributed Operating System, Proc. IEEE 6th Int. Conf. Distrib. Compt. Sys., pp. 558–563, (19–23 May 1986).
T. Sawer and O. Serlin. DebitCredit Benchmark — Minimum Requirements and Compliance List, Codd & Date Consulting Group, San Jose, (June 1988).
P. Townsend, Flagship Hardware and Implementation. ICL Technical Journal, 5(3), pp. 574–595, (May 1987).
I. Watson, J. Sargeant, P. Watson and V. Woods. The FLAGSHIP Parallel Machine, CONPAR 88, BCS Workshop Series, CUP, pp. 125–133, (1988).
Author information
Authors and Affiliations
Editor information
Rights and permissions
Copyright information
© 1990 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Ward, M., Townsend, P., Watzlawik, G. (1990). EDS hardware architecture. In: Burkhart, H. (eds) CONPAR 90 — VAPP IV. VAPP CONPAR 1990 1990. Lecture Notes in Computer Science, vol 457. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-53065-7_157
Download citation
DOI: https://doi.org/10.1007/3-540-53065-7_157
Published:
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-53065-7
Online ISBN: 978-3-540-46597-3
eBook Packages: Springer Book Archive