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UK/Japan Workshop on Concurrency

CONCURRENCY 1989: Concurrency: Theory, Language, and Architecture pp 215–234Cite as

Semantic specifications for the rewrite rule machine

  • Part III Parallel Architectures And VLSI Logic
  • Conference paper
  • First Online:

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 491))

Abstract

This paper presents three semantic specifications for the Rewrite Rule Machine. This machine consists of a large number of parallel rewrite processors operating independently, each implemented as a VLSI chip. The first specification, called parallel rewriting, provides an abstract operational semantics for the rewrite processor. The second specification, called the cell machine model, provides a more concrete operational semantics for this processor, using algebraic semantics (in OBJ) and set theory. The third specification, called concurrent rewriting, gives an abstract semantics for the Rewrite Rule Machine as a whole.

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References

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  1. Programming Research Group, Oxford University SRI International, 94025, Menlo Park, CA

    Joseph A. Goguen

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  1. Joseph A. Goguen
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Akinori Yonezawa Takayasu Ito

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© 1991 Springer-Verlag Berlin Heidelberg

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Goguen, J.A. (1991). Semantic specifications for the rewrite rule machine. In: Yonezawa, A., Ito, T. (eds) Concurrency: Theory, Language, and Architecture. CONCURRENCY 1989. Lecture Notes in Computer Science, vol 491. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-53932-8_53

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  • DOI: https://doi.org/10.1007/3-540-53932-8_53

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-53932-2

  • Online ISBN: 978-3-540-46452-5

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