Abstract
We discuss a method constructing efficient multiprocessor networks based on combinatorial designs. The principal goal is to reduce the network diameter while keeping the number of processor ports small. With a smart multiplexing technique and the use of a class of bipartite graphs we are able to construct e.g. a 1210 processor machine with 4 ports/processor and diameter 2.
This work was done at the Institute for Algorithms und Cognitive Systems, University of Karlsruhe.
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References
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© 1992 Springer-Verlag Berlin Heidelberg
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Hatz, V. (1992). Interconnection networks based on block designs. In: Bougé, L., Cosnard, M., Robert, Y., Trystram, D. (eds) Parallel Processing: CONPAR 92—VAPP V. VAPP CONPAR 1992 1992. Lecture Notes in Computer Science, vol 634. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-55895-0_395
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DOI: https://doi.org/10.1007/3-540-55895-0_395
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