Abstract
We explore time and space optimization problems involved in the mapping of parallel algorithms onto a honeycomb architecture. When a well-known mapping is used, mapped algorithms generally exhibit execution slow-down and require too large area. We design several optimization techniques and enhance the mapping process. Experimental results show more than 50 % saving in processor resources and 30 % saving in execution time, on average. Since computing performances are improved, also the applicability of the honeycomb architecture is wider.
This research is supported by the Ministry of Science and Technology of the Republic of Slovenia under grant P2-5092-106/93.
Preview
Unable to display preview. Download preview PDF.
References
Kung, S.Y.: VLSI Array Processors. (Prentice Hall, 1988).
Koren, I., Peled, I.: The Concept and Implementation of Data-Driven Array. IEEE Computer 20 (July 1987) 102–103.
Koren, I., Silberman, G.M.: A Direct Mapping of Algorithms onto VLSI Processing Arrays Based on the Data Flow Approach. Proc. 1983 Int'l Conference on Parallel Processing, August 1983, 335–337.
Mendelson, B., Silberman, G.M.: An Improved Mapping of Data Flow Programs on a VLSI Array of Processors. Proc. 1987 Int'l Conference on Parallel Processing, August 1987, 871–873.
Weiss, S., Spillinger, I., Silberman, G.M.: Architectural Improvements for Data-Driven VLSI Processing Arrays. Proc. 1989 Conference on Functional Programming Languages and Computer Architecture, September 1989, 243–259.
Mendelson, B., Koren, I.: Using Simulated Annealing for Mapping Algorithms onto Data-Driven Arrays. Proc. 1991 Int'l Conference on Parallel Processing, August 1991, I-123–I-127.
Koren, I., Mendelson, B., Peled, I., Silberman, G.M.: A Data-Driven VLSI Array for Arbitrary Algorithms. IEEE Computer 21 (October 1988) 30–43.
Mendelson, B., Koren, I.: Estimating the Potential Parallelism and Pipelining of Algorithms for Data Flow Machines. Journal of Parallel and Distributed Computing 14 (January 1992) 15–28.
Mendelson, B., Silberman, G.M.: Mapping Data Flow Programs on a VLSI Array of Processors. Proc. 14th Annual Int'l Symposium on Computer Architecture, June 1987, 72–80.
Robič, B., Kolbezen, P., Šilc, J.: Area Optimization of Dataflow-Graph Mappings. Parallel Computing 18, 3 (1992) 297–311.
Papadimitriou, C.H., Steiglitz, K.: Combinatorial Optimization: Algorithms and Complexity. (Prentice Hall, 1982).
Johnson, M.E., ed.: Simulated Annealing (SA) & Optimization: Modern Algorithms with VLSI, Optimal Design, and Missile Defence Applications. American Journal of Mathematical and Management Sciences 8, 3 & 4 (1988) 205–449.
Dueck, G., Scheuer, T.: Threshold Accepting: A General Purpose Optimization Algorithm Appearing Superior to Simulated Annealing. Tech. Rep. TR 88.10.011, IBM Scientific Center, Heidelberg, October 1988.
Lee, C., Bic, L.: Comparing Quenching and Slow Simulated Annealing on the Mapping Problem. Proc. 3rd Annual Parallel Processing Symposium, March 1989, 671–685.
Robič, B., Kolbezen, P., Šilc, J.: Graph Compactor for Mapping of Algorithms on VLSI Processor Arrays. Proc. ISMM Int'l Workshop Parallel Computing, September 1991, 198–200.
Mendelson, B., Silberman, G.M.: Private communication.
Iannucci, R.A.: A Dataflow/von Neumann Hybrid Architecture. Tech. Rep. TR-418, Lab. Computer Science, MIT, Massachusetts, May 1988.
Šilc, J., Robič, B.: Synchronous Dataflow-Based Architecture. Microprocessing and Microprogramming 27, 1–5 (1989) 315–322.
Author information
Authors and Affiliations
Editor information
Rights and permissions
Copyright information
© 1993 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Robič, B., Šilc, J. (1993). High-performance computing on a honeycomb architecture. In: Volkert, J. (eds) Parallel Computation. ACPC 1993. Lecture Notes in Computer Science, vol 734. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-57314-3_1
Download citation
DOI: https://doi.org/10.1007/3-540-57314-3_1
Published:
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-57314-2
Online ISBN: 978-3-540-48055-6
eBook Packages: Springer Book Archive