Abstract
Many inner loop bodies in numerical applications are short with a disproportionally large amount of array operations which are potentially remote operations. Consequently, fewer threads can remain active while the requested data is in transit. When such situations arise, a processor can either remain idle or switch to another activation. Both options result in poor processor utilization which adversely affects the overall performance of a program. Because these loops are often the kernel of an application, there is a strong incentive for improving the performance of such loops. As a solution, this paper proposes a fine-grain execution model called the Multiple Iterations per Activation (MIpA) model.
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© 1994 Springer-Verlag Berlin Heidelberg
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Kim, C., Gaudiot, JL. (1994). A hierarchical activation management technique for fine-grain multithreaded execution. In: Halatsis, C., Maritsas, D., Philokyprou, G., Theodoridis, S. (eds) PARLE'94 Parallel Architectures and Languages Europe. PARLE 1994. Lecture Notes in Computer Science, vol 817. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-58184-7_132
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DOI: https://doi.org/10.1007/3-540-58184-7_132
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