Abstract
This article will discuss the trade-off between segmented and continous interconnect in programmable logic devices and the effect on performance and ease of use in logic design. The article will describe the effects on interconnect delay paths of both styles of programmable interconnect and will show how these affect overal performance.
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© 1994 Springer-Verlag Berlin Heidelberg
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Toon, N. (1994). Continuous interconnect provides solution to density/performance trade-off in programmable logic. In: Hartenstein, R.W., Servít, M.Z. (eds) Field-Programmable Logic Architectures, Synthesis and Applications. FPL 1994. Lecture Notes in Computer Science, vol 849. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-58419-6_104
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DOI: https://doi.org/10.1007/3-540-58419-6_104
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Print ISBN: 978-3-540-58419-3
Online ISBN: 978-3-540-48783-8
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