Abstract
Spyder is a processor architecture with three concurrent, reconfigurable execution units implemented by FPGAs. This paper presents the hardware evolution of the Spyder processor and its evolving software development environment.
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© 1994 Springer-Verlag Berlin Heidelberg
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Iseli, C., Sanchez, E. (1994). A superscalar and reconfigurable processor. In: Hartenstein, R.W., Servít, M.Z. (eds) Field-Programmable Logic Architectures, Synthesis and Applications. FPL 1994. Lecture Notes in Computer Science, vol 849. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-58419-6_87
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DOI: https://doi.org/10.1007/3-540-58419-6_87
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Online ISBN: 978-3-540-48783-8
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