Abstract
In this paper we address the problem of constructing efficient hardware solutions for Region of influence (ROI) incremental algorithms. First we shall review the main features associated with these neural models, paying special attention to the basic operations required in order to fulfil the data flow imposed by their training and recall phases. Taking into account the resource organization demanded by this data flow, we shall propose an efficient digital realization which is capable to convert into a physical implementation the organization principles stated previously. The proposed realization is composed of a bidimensional array of processing units, which have been developed as RISC processors. After explaining the emulation sequence to be used for ROI incremental models on the proposed realization, we evaluate the performance (measured in terms of processing speed) attainable by the system when real world classification tasks have to be handled. Our results shown that the proposed realization considerably outperforms recent commercial developments.
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© 1995 Springer-Verlag Berlin Heidelberg
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Moreno, J.M., Madrenas, J., San Anselmo, S., Castillo, F., Cabestany, J. (1995). Digital hardware implementation of ROI incremental algorithms. In: Mira, J., Sandoval, F. (eds) From Natural to Artificial Neural Computation. IWANN 1995. Lecture Notes in Computer Science, vol 930. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-59497-3_248
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DOI: https://doi.org/10.1007/3-540-59497-3_248
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