Towards automatic parallelization of logic programs

Abstract

One of the striking features of logic programs is that they can be easily parallelized. A particularly simple way of turning a logic program into a parallel program was proposed in Naish [Nai82, Nai88], by means of the so-called delay declarations.

The resulting programs exhibit a highly complex behaviour as during their executions dynamic networks of asynchronously communicating processes are created.

In our recent paper Apt and Luitjes [AL95] we studied verification of these programs. In particular, we showed how the methods originally developed for the analysis of Prolog programs can be naturally adapted to prove correctness of logic programs with delay declarations.

Here we discuss a reverse problem: how to parallelize a pure Prolog program by generating the appropriate delay declarations, so that correctness is maintained and deadlock avoided. To this end we identify the crucial properties that the original Prolog program should satisfy and analyze which aspects of the parallelization process and of the correctness proof could be automated.