Abstract
Cellular Processing is an attractive and simple massive parallel processing model. To increase its general acceptance and usability it must be supported by a software environment, an efficient simulator and a special language. For this purpose the cellular description language CDL was defined and implemented. With CDL complex cellular algorithms can be described in a concise and readable form. Compilers were developed which generate C-code for the software simulator or a logical design for the CEPRA-8L simulator, which uses field programmable gatearrays to compute the state transition of the cells. An example is presented to show the process of compilation for different target architectures.
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© 1995 Springer-Verlag Berlin Heidelberg
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Hochberger, C., Hoffmann, R., Waldschmidt, S. (1995). Compilation of CDL for different target architectures. In: Malyshkin, V. (eds) Parallel Computing Technologies. PaCT 1995. Lecture Notes in Computer Science, vol 964. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-60222-4_107
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DOI: https://doi.org/10.1007/3-540-60222-4_107
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