Abstract
This paper presents an overview of a prototype hardware compiler which compiles a design expressed in the Ruby language into FPGAs. The features of two important modules, the refinement module and the floorplanning module, are discussed and illustrated. Target code can be produced in various formats, including device-specific formats such as XNF or CFG, and device-independent formats such as VHDL. The viability of our floorplanning scheme is demonstrated by a compiler backend for Algotronix's CAL1024 FPGAs. The implementation of a priority queue is used to illustrate our approach.
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References
E. Brunvand, “Using FPGAs to implement self-timed systems”, Journal of VLSI Signal Processing, vol. 6, 1990, pp. 173–190.
S. Guo, W. Luk and P. Probert, “Developing parallel architectures for range and image sensors”, in Proc. IEEE Int. Conf. on Robotics and Automation, IEEE Computer Society Press, 1994, pp. 2205–2210.
S. Guo and W. Luk, “Producing design diagrams from declarative descriptions”, to appear in Proc. Fourth Int. Conf. on CAD and CG, SPIE, 1995.
G. Jones and M. Sheeran, “Circuit design in Ruby”, in Formal Methods for VLSI Design, J. Staunstrup (ed.), North-Holland, 1990, pp. 13–70.
W. Luk, “Analysing parametrised designs by non-standard interpretation”, in Proc. Int. Conf. on Application-Specific Array Processors, S.Y. Kung, E. Swartzlander, J.A.B. Fortes and K.W. Przytula (eds.), IEEE Computer Society Press, 1990, pp. 133–144.
W. Luk and I. Page, “Parameterising designs for FPGAs”, in FPGAs, W. Moore and W. Luk (eds.), Abingdon EE&CS Books, 1991, pp. 284–295.
W. Luk and T. Wu, “Towards a declarative framework for hardware-software code-sign”, in Proc. Third International Workshop on Hardware/Software Codesign, IEEE Computer Society Press, 1994, pp. 181–188.
W. Luk, D. Ferguson and I. Page, “Structured hardware compilation of parallel programs”, in More FPGAs, W. Moore and W. Luk (eds.), Abingdon EE&CS Books, 1994, pp. 213–224.
W. Luk, “A declarative approach to incremental custom computing”, in Proc. IEEE Workshop on FPGAs for Custom Computing Machines, D.A. Buell and K.L. Pocek (eds.), IEEE Computer Society Press, 1995.
M. Newman, W. Luk and I. Page, “Constraint-based hierarchical hardware compilation of parallel programs”, in Field-Programmable Logic: Architecture Synthesis and Applications, LNCS 849, Springer-Verlag, 1994, pp. 220–229.
M. Wazlowski et. al., “PRISM II: compiler and architecture”, in Proc. IEEE Workshop on FPGAs for Custom Computing Machines, D.A. Buell and K.L. Pocek (eds.), IEEE Computer Society Press, 1993, pp. 9–16.
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© 1995 Springer-Verlag Berlin Heidelberg
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Guo, S., Luk, W. (1995). Compiling Ruby into FPGAs. In: Moore, W., Luk, W. (eds) Field-Programmable Logic and Applications. FPL 1995. Lecture Notes in Computer Science, vol 975. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-60294-1_112
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DOI: https://doi.org/10.1007/3-540-60294-1_112
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