Skip to main content

A hardware genetic algorithm for the traveling salesman problem on Splash 2

  • Embedded Systems and Other Applications
  • Conference paper
  • First Online:
Field-Programmable Logic and Applications (FPL 1995)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 975))

Included in the following conference series:

Abstract

With the introduction of Splash, Splash 2, PAM, and other reconfigurable computers, a wide variety of algorithms can now be feasibly constructed in hardware. In this paper, we describe the Splash 2 Parallel Genetic Algorithm (SPGA), which is a parallel genetic algorithm for optimizing symmetric traveling salesman problems (TSPs) using Splash 2. Each processor in SPGA consists of four Field Programmable Gate Arrays (FPGAs) and associated memories and was found to perform 6.8 to 10.6 times the speed of equivalent software on a state-of-the-art workstation. Multiple processor SPGA systems, which use up to eight processors, find good TSP solutions much more quickly than single processor and software-based implementations of the genetic algorithm. The four-processor island-parallel SPGA implementation out performed all other SPGA configurations tested. We conclude noting that the described parallel genetic algorithm appears to be a good match for reconfigurable computing machines and that Splash 2's various interconnect resources and support for linear systolic and MIMD computing models was important for the implementation of SPGA.

This work was supported by ARPA/CSTO under contract number DABT63-94-C-0085 under a subcontract to National Semiconductor

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. M. Gokhale, W. Holmes, A. Kopser, S. Lucas, R. Minnich, D. Sweely, and D. Lopresti. Building and using a highly parallel programmable logic array. IEEE Computer, 24(1):81–89, January 1991.

    Google Scholar 

  2. J. M. Arnold, D. A. Buell, and E. G. Davis. Splash 2. In Proceedings of the 4th Annual ACM Symposium on Parallel Algorithms and Architectures, pages 316–324, June 1992.

    Google Scholar 

  3. P. Bertin, D. Roncin, and J. Vuillemin. Introduction to programmable active memories. In J. McCanny, J. McWhirther, and E. Swartslander Jr., editors, Systolic Array Processors, pages 300–309. Prentice Hall, 1989.

    Google Scholar 

  4. D. P. Lopresti. Rapid implementation of a genetic sequence comparator using field-programmable gate arrays. In C. Sequin, editor, Advanced Research in VLSI: Proceedings of the 1991 University of California/Santa Cruz Conference, pages 138–152, Santa Cruz, CA, March 1991.

    Google Scholar 

  5. P. Bertin, D. Roncin, and J. Vuillemin. Programmable active memories: a performance assessment. In G. Borriello and C. Ebeling, editors, Research on Integrated Systems: Proceedings of the 1993 Symposium, pages 88–102, 1993.

    Google Scholar 

  6. J. H. Holland. Adaptation in Natural and Artificial Systems. University of Michigan Press, 1975.

    Google Scholar 

  7. R. Vemuri, R.; Vemuri. Mcm layer assignment using genetic search. Electronics Letters, 30(20):1635–7, September 1994.

    Google Scholar 

  8. N.; Hong Ren Mou, E.S.H.; Ansari. A genetic algorithm for multiprocessor scheduling. IEEE Transactions on Parallel and Distributed System, 5(2):113–120, February 1994.

    Google Scholar 

  9. John E. Lansberry and L. Wozniak. Adaptive hydrogenerator governor tuning with a genetic algorithm. IEEE Transactions on Energy Conversion, 9(1):179–183, March 1994.

    Google Scholar 

  10. M. C. Leu; H. Wong; and Z. Ji. Planning of component placement/insertion sequence and feeder setup in pcb assembly using genetic algorithm. Transactions of the ASME, 115:424–432, December 1993.

    Google Scholar 

  11. M. Dorigo and V. Maniezzo. Parallel genetic algorithms: Introduction and overview of current research. In J. Stender, editor, Parallel Genetic Algorithms: Theory and Applications, pages 5–41. IO Press, Washington DC, 1993.

    Google Scholar 

  12. J. M. Arnold, D. A. Buell, and E. G. Davis. VHDL programming on Splash 2. In More FPGAs: Proceedings of the 1993 International Workshop on Field-Programmable Logic and Applications, pages 182–191, Oxford, England, September 1993.

    Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Editor information

Will Moore Wayne Luk

Rights and permissions

Reprints and permissions

Copyright information

© 1995 Springer-Verlag Berlin Heidelberg

About this paper

Cite this paper

Graham, P., Nelson, B. (1995). A hardware genetic algorithm for the traveling salesman problem on Splash 2. In: Moore, W., Luk, W. (eds) Field-Programmable Logic and Applications. FPL 1995. Lecture Notes in Computer Science, vol 975. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-60294-1_129

Download citation

  • DOI: https://doi.org/10.1007/3-540-60294-1_129

  • Published:

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-60294-1

  • Online ISBN: 978-3-540-44786-3

  • eBook Packages: Springer Book Archive

Publish with us

Policies and ethics