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International Workshop on Field Programmable Logic and Applications

FPL 1995: Field-Programmable Logic and Applications pp 439–448Cite as

Classification and performance of reconfigurable architectures

  • Reconfigurable Designs and Models
  • Conference paper
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Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 975))

Abstract

Recently, several systems have been designed which use reconfigurable logic to perform general purpose computation. While the number of these systems being constructed continues to increase, their relationship to conventional architectures is not clear. This paper proposes a model which unifies traditional instruction set architectures with reconfigurable architectures. From this model, four major architectural categories of reconfigurable machines are given. From this classification, issues of performance, programmability and scalability are addressed.

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Author information

Authors and Affiliations

  1. Computer Engineering Research Center Department of Electrical and Computer Engineering, University of Texas at Austin, 78712, Austin, Texas

    Steven A. Guccione & Mario J. Gonzalez

Authors
  1. Steven A. Guccione
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  2. Mario J. Gonzalez
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Will Moore Wayne Luk

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© 1995 Springer-Verlag Berlin Heidelberg

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Guccione, S.A., Gonzalez, M.J. (1995). Classification and performance of reconfigurable architectures. In: Moore, W., Luk, W. (eds) Field-Programmable Logic and Applications. FPL 1995. Lecture Notes in Computer Science, vol 975. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-60294-1_138

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  • DOI: https://doi.org/10.1007/3-540-60294-1_138

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-60294-1

  • Online ISBN: 978-3-540-44786-3

  • eBook Packages: Springer Book Archive

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