Abstract
This paper presents an implementation for computing weight distributions of binary linear block codes on an FPGA-based Custom Computing Machine (CCM). It consists of a heavily pipelined circuit customized for every code investigated. A hardware solution is very attractive for this time-consuming problem: It is about seven times faster than the best software solution we know and computes a new weight every 150 ns. For larger codes the saved time is in the range of days. The key concepts and some peculiarities of this implementation are presented along with performance data. Additionally, we discuss chances of and obstacles to automatically deriving this solution from a high-level program (rather than from an HDL description).
This work has been supported by the Deutsche Forschungsgemeinschaft, Graduiertenkolleg “Beherrschbarkeit komplexer Systeme” (GRK 209/2-96).
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Weinhardt, M. (1996). Computing weight distributions of binary linear block codes on a CCM. In: Hartenstein, R.W., Glesner, M. (eds) Field-Programmable Logic Smart Applications, New Paradigms and Compilers. FPL 1996. Lecture Notes in Computer Science, vol 1142. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-61730-2_50
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DOI: https://doi.org/10.1007/3-540-61730-2_50
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