Abstract
In this paper we study the problem of register allocation in the presence of parallel conditional branches with a given branching depth d. We start from a scheduled flow graph and the goal is to find an assignment of the variables in the flow graph to a minimum number of registers. This problem can be solved by coloring the corresponding conflict graph G=(V, E). We describe a new approximation algorithm with constant worst case rate for flow graphs with constant branching depth. The algorithm works in two steps. In the first step, the lifetimes are enlarged such that the lifetimes form one unique interval across the different possible execution paths for each variable. We prove that the conflict graph ¯G with enlarged lifetimes satisfies ω(¯G)≤(2d+1)ω(G) where ω(G) is the cardinality of a maximum clique in G. In the second step, we propose an algorithm with approximation bound (d+1)ξ(¯G) for ¯G, using its specific structure.
Preview
Unable to display preview. Download preview PDF.
References
A. Aho, R. Sethi and J. Ullman: Compilers, Principles, Techniques and Tools, Addision Wesley, 1988.
R.A. Bergamaschi, R. Camposano and M. Payer: Data-path synthesis using path analysis, 28.th Design Automation Conference (1991), 591–595.
R. Camposano and W. Wolf: High-Level Synthesis, Kluwer, Dordrecht, 1992.
G.J. Chaitin: Register allocation and spilling via graph coloring, Symposium on Compiler Construction (1982), 98–101.
M.C. MacFarland, A.C. Parker and R. Camposano: Tutorial on high-level synthesis, 25.th Design Automation Conference (1988), 330–336.
D. Gajski, N. Dutt, A. Wu and S. Lin: High-Level Synthesis: Introduction to Chip and System Design, Kluwer, Dordrecht, 1992.
M.S. Hecht: Flow Analysis of Computer Programs, Elsevier, New York, 1977.
C.Y. Huang, Y.S. Chen, Y.L. Lin and Y.C. Hsu: Data path allocation based on bipartite weighted matching, 27.th Design Automation Conference (1990), 499–503.
K. Jansen: Processor-optimization for flow graphs, Theoretical Computer Science 104 (1992), 285–298.
K. Jansen: On the complexity of allocation problems in high level synthesis, Integration — the VLSI Journal 17 (1994), 241–252.
K. Jansen and J. Reiter, Approximation algorithms for register allocation, Universität Trier, Forschungsbericht 13 (1996).
S. Kannan and T. Proebsting, Register allocation in structured programs, Symposium on Discrete Algorithms (SODA), 1995, 360–368.
F. J. Kurdahi and A.C. Parker: Real: a program for register allocation, 24.th Design Automation Conference (1987), 210–215.
P. Michel, U. Lauther and P. Duzy: The Synthesis Approach to Digital System Design, Kluwer, Dordrecht, 1992.
C. Park, T. Kim and C.L. Liu: Register allocation for general data flow graphs, 2.nd European Design Automation Conference (1993), 232–237.
P. Pfahler: Automated datapath synthesis: a compilation approach, Microprocessing and Microprogramming 21 (1987), 577–584.
D.L. Springer and D.E. Thomas: Exploiting the special structure of conflict and compatibility graphs in high-level synthesis, International Conference on Computer Aided Design (1990), 254–257.
C.J. Tseng and D. Siewiorek: Automated synthesis of data paths in digital systems, IEEE Transactions on CAD 6 (1989), 379–395.
Author information
Authors and Affiliations
Editor information
Rights and permissions
Copyright information
© 1997 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Jansen, K., Reiter, J. (1997). A new approximation algorithm for the register allocation problem. In: Bilardi, G., Ferreira, A., Lüling, R., Rolim, J. (eds) Solving Irregularly Structured Problems in Parallel. IRREGULAR 1997. Lecture Notes in Computer Science, vol 1253. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-63138-0_13
Download citation
DOI: https://doi.org/10.1007/3-540-63138-0_13
Published:
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-63138-5
Online ISBN: 978-3-540-69157-0
eBook Packages: Springer Book Archive